Phase change memory device
First Claim
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1. A method of reading a memory device, the method comprising:
- sequentially coupling each of a plurality of reference cells to at least one of a plurality of comparators, each of a plurality of memory cell data bit lines being coupled to only one of the plurality of comparators, each of the plurality of reference cells being coupled to one of a plurality of reference cell bit lines and further being in a common row line with only a respective one of a plurality of memory cells to which it is being compared, each of the reference cells being programmed to a pre-defined threshold voltage corresponding to a respective reference value; and
comparing an electrical behavior of each of the plurality of memory cells and of the sequentially coupled ones of the plurality of reference cells to determine a value of respective ones of the plurality of memory cells being read.
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Abstract
A phase change memory device with memory cells (2) formed by a phase change memory element (3) and a selection switch (4). A reference cell (2a) formed by an own phase change memory element (3) and an own selection switch (4) is associated to a group (7) of memory cells to be read. An electrical quantity of the group of memory cells is compared with an analogous electrical quantity of the reference cell, thereby compensating any drift in the properties of the memory cells.
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Citations
20 Claims
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1. A method of reading a memory device, the method comprising:
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sequentially coupling each of a plurality of reference cells to at least one of a plurality of comparators, each of a plurality of memory cell data bit lines being coupled to only one of the plurality of comparators, each of the plurality of reference cells being coupled to one of a plurality of reference cell bit lines and further being in a common row line with only a respective one of a plurality of memory cells to which it is being compared, each of the reference cells being programmed to a pre-defined threshold voltage corresponding to a respective reference value; and comparing an electrical behavior of each of the plurality of memory cells and of the sequentially coupled ones of the plurality of reference cells to determine a value of respective ones of the plurality of memory cells being read. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A system, comprising:
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a memory array having a plurality of phase change memory elements arranged in groups with each group being couplable to a respective row line, selected ones of the plurality of phase change memory elements further being coupled to a respective bit line, each bit line being coupled to only one of a plurality of comparators; a first plurality of reference phase change memory elements each coupled to one of a plurality of reference cell bit lines, the first plurality of reference phase change memory elements being couplable to a respective one of the groups through the respective row line and to at least one of the plurality of comparators; and a reading stage couplable to the memory array through reference column line switches to provide current from one of the plurality of reference phase change memory elements coupled to a specific one of the respective row lines during a read operation occurring in the respective row line, the reference column line switches being configured to be activated in sequence. - View Dependent Claims (10, 11, 12, 13, 14)
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15. A memory array, comprising:
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a plurality of phase change memory elements arranged in rows and columns, the plurality of phase change memory elements further being arranged in groups where each group is couplable to a respective row line, each of the columns of the plurality of phase change memory elements in a column being coupled to one of a plurality of data column lines, the plurality of data column lines each coupled to one of a plurality of comparators; and a plurality of reference cells each coupled to one of a plurality of reference column lines and each including a reference phase change memory element and a reference selecting element to couple sequentially each of a respective one of the plurality of reference cells to a reference column line and to at least one of the plurality of comparators, at least one of the plurality of reference cells being arranged in proximity to each of the groups and couplable only to the respective row line for the group, each of the plurality of reference cells being programmed to a pre-defined threshold voltage corresponding to a respective reference value. - View Dependent Claims (16, 17, 18, 19, 20)
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Specification