Method for manufacturing semiconductor device

• US 9,780,229 B2
• Filed: 11/03/2016
• Issued: 10/03/2017
• Est. Priority Date: 05/20/2010
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei, Suzawa, Hideomi, Sasagawa, Shinya
• Primary Examiner(s): Smith, Zandra
• Assistant Examiner(s): BOYLE, ABBIGALE A
• Application Number:
  US15/342,316
• Publication Number:
  US 20170054030A1
• Time in Patent Office: 334 Days
• Field of Search: None
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

An object of an embodiment of the present invention is to provide a semiconductor device including a normally-off oxide semiconductor element whose characteristic variation is small in the long term. A cation containing one or more elements selected from oxygen and halogen is added to an oxide semiconductor layer, thereby suppressing elimination of oxygen, reducing hydrogen, or suppressing movement of hydrogen. Accordingly, carriers in the oxide semiconductor can be reduced and the number of the carriers can be kept constant in the long term. As a result, the semiconductor device including the normally-off oxide semiconductor element whose characteristic variation is small in the long term can be provided.

Claims

1. A method for manufacturing a semiconductor device, comprising:

forming a gate electrode over an insulator;

forming a gate insulating layer over the gate electrode;

performing a first plasma treatment to add oxygen to the gate insulating layer;

forming a first oxide semiconductor layer over the gate insulating layer;

performing a second plasma treatment to add oxygen to the first oxide semiconductor layer;

forming a second oxide semiconductor layer over the first oxide semiconductor layer after the second plasma treatment;

forming a source electrode and a drain electrode over the second oxide semiconductor layer; and

forming an insulating layer over the second oxide semiconductor layer, the source electrode, and the drain electrode,

wherein each of the first oxide semiconductor layer and the second oxide semiconductor layer overlaps with the gate electrode.

2. The method for manufacturing a semiconductor device according to claim 1,

wherein the second plasma treatment is inductively coupled plasma treatment,

wherein a power applied to a lower electrode provided on a substrate side in the second plasma treatment is greater than or equal to 0 W and less than or equal to 300 W.

3. The method for manufacturing a semiconductor device according to claim 1,

wherein the first plasma treatment is inductively coupled plasma treatment,

wherein a power for the first plasma treatment is greater than or equal to 100 W and less than or equal to 2000 W, and

wherein a power applied to a lower electrode provided on a substrate side in the first plasma treatment is greater than or equal to 0 W and less than or equal to 300 W.

4. The method for manufacturing a semiconductor device according to claim 1,

wherein a concentration of hydrogen in the gate insulating layer is less than or equal to 5×

10²⁰ atoms/cm³.

5. The method for manufacturing a semiconductor device according to claim 1,

wherein the first oxide semiconductor layer and the second oxide semiconductor layer comprise indium, gallium, and zinc.

6. The method for manufacturing a semiconductor device according to claim 1,

wherein the first plasma treatment and the second plasma treatment are performed by one selected from an electron cyclotron resonance (ECR) plasma method, a helicon wave plasma (HWP) method, an inductively coupled plasma (ICP) method, and a microwave-excited surface wave plasma (SWP) method;

or a combination thereof.

7. The method for manufacturing a semiconductor device according to claim 1, further comprising:

performing a heat treatment at the time of performing a second plasma treatment to the first oxide semiconductor layer.

15. The method for manufacturing a semiconductor device according to claim 1, wherein a power for the second plasma treatment performed to the first oxide semiconductor layer is greater than or equal to 100 W and less than or equal to 2000 W.

8. A method for manufacturing a semiconductor device, comprising:

forming a first oxide semiconductor layer over an insulator;

performing a first plasma treatment to add oxygen to the first oxide semiconductor layer;

forming a second oxide semiconductor layer over the first oxide semiconductor layer after the first plasma treatment;

forming a source electrode and a drain electrode over the second oxide semiconductor layer;

forming a gate insulating layer over the second oxide semiconductor layer, the source electrode and the drain electrode;

performing a second plasma treatment to add oxygen to the gate insulating layer; and

forming a gate electrode over the gate insulating layer,

wherein the gate electrode overlaps with the first oxide semiconductor layer and the second oxide semiconductor layer.

9. The method for manufacturing a semiconductor device according to claim 8,

wherein the first plasma treatment is inductively coupled plasma treatment,

wherein a power applied to a lower electrode provided on a substrate side in the first plasma treatment is greater than or equal to 0 W and less than or equal to 300 W.

10. The method for manufacturing a semiconductor device according to claim 8,

wherein the second plasma treatment is inductively coupled plasma treatment, and

wherein a power applied to a lower electrode provided on a substrate side in the second plasma treatment is greater than or equal to 0 W and less than or equal to 300 W.

11. The method for manufacturing a semiconductor device according to claim 8,

wherein a concentration of hydrogen in the gate insulating layer is less than or equal to 5×

10²⁰ atoms/cm³.

12. The method for manufacturing a semiconductor device according to claim 8,

wherein the first oxide semiconductor layer and the second oxide semiconductor layer comprise indium, gallium, and zinc.

13. The method for manufacturing a semiconductor device according to claim 8,

wherein the first plasma treatment and the second plasma treatment are performed by one selected from an electron cyclotron resonance (ECR) plasma method, a helicon wave plasma (HWP) method, an inductively coupled plasma (ICP) method, and a microwave-excited surface wave plasma (SWP) method;

or a combination thereof.

14. The method for manufacturing a semiconductor device according to claim 8, further comprising:

performing a heat treatment at the time of performing a first plasma treatment to the first oxide semiconductor layer.

16. The method for manufacturing a semiconductor device according to claim 8, wherein a power for the first plasma treatment performed to the first oxide semiconductor layer is greater than or equal to 100 W and less than or equal to 2000 W.