Liquid crystal display panel having dummy gate line for applying dummy gate pulse and liquid crystal display device using the same

• US 9,785,269 B2
• Filed: 12/01/2015
• Issued: 10/10/2017
• Est. Priority Date: 12/03/2014
• Status: Active Grant

• Current Assignee: LG Display Co., Ltd.
• Original Assignee: LG Display Co., Ltd.
• Inventors: Lee, Sangho, Seo, YoungHyoung
• Primary Examiner(s): Snyder, Adam J
• Application Number:
  US14/955,874
• Publication Number:
  US 20160162087A1
• Time in Patent Office: 679 Days
• Field of Search: 345173, 178 1806
• CPC Class Codes: G02F 1/13338 Input devices, e.g. touch panels
• CPC Class Codes: G02F 1/136286 Wiring, e.g. gate line, drain line
• CPC Class Codes: G06F 3/0412 Digitisers structurally integrated in a display
• CPC Class Codes: G06F 3/0416 Control or interface arrangements specially adapted for digitisers
• CPC Class Codes: G06F 3/047 using sets of wires, e.g. crossed wires
• CPC Class Codes: G09G 2300/0413 Details of dummy pixels or dummy lines in flat panels
• CPC Class Codes: G09G 2320/0219 Reducing feedthrough effects in active matrix panels, i.e. voltage changes on the scan electrode influencing the pixel voltage due to capacitive coupling
• CPC Class Codes: G09G 2354/00 Aspects of interface with display user
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence
• CPC Class Codes: G09G 3/3677 suitable for active matrices only

Abstract

A liquid crystal display panel and a liquid crystal display device having the liquid crystal display panel are provided in which a dummy gate line outputting a dummy gate pulse having an inverted waveform of gate pulse is formed to be parallel to gate lines outputting the gate pulses and to be perpendicular to touch electrodes supplied with a common voltage.

Claims

1. A liquid crystal display panel comprising:

gate lines configured to transfer a gate pulse;

data lines configured to transfer a data voltage;

first touch electrodes configured to be parallel to the gate lines, to serve as a common electrode and to serve as a touch sensing structure;

second touch electrodes configured to be perpendicular to the gate lines, to serve as a common electrode and to serve as a touch sensing structure; and

at least one dummy gate line configured to be parallel to the gate lines, overlap the data lines and the second touch electrodes, and receive a dummy gate pulse having an inverted waveform of the gate pulse.

2. The liquid crystal display device according to claim 1, wherein the dummy gate line is an outermost side of a display area of the display or is arranged inside the display area.

3. The liquid crystal display device according to claim 2, wherein one dummy gate line is at sequential end of the gate lines having a parallel arrangement.

4. The liquid crystal display device according to claim 1, wherein the first touch electrodes overlapped with two or more gate lines and the second touch electrodes overlapped with two or more data lines.

5. A liquid crystal display device comprising:

a liquid crystal display panel in which gate lines, data lines, first touch electrodes that are parallel to the gate lines, second touch electrodes that are perpendicular to the gate lines, and at least one dummy gate line that is parallel to the gate lines and overlaps the data lines and the second touch electrodes are arranged;

a touch sensing unit that supplies a common voltage to the first touch electrodes and the second touch electrodes during an image display period, and that sequentially supplies a touch drive signal to the first touch electrodes or the second touch electrodes, receives the sensed signals transmitted from the first electrodes or the second touch electrodes, and determines whether a touch contact or operation has occurred during a touch sensing period; and

a gate driver that sequentially outputs gate pulses to the gate lines during the image display period, and that outputs dummy gate pulses having an inverted waveform of the gate pulses to the dummy gate line whenever the gate pulses are output to the gate lines.

6. The liquid crystal display device according to claim 5, wherein the dummy gate line is arranged on an outermost side of a display area of the liquid crystal display panel or is arranged inside the display area.

7. The liquid crystal display device according to claim 5, wherein the gate driver includes stages that output the gate pulses to the gate lines, and at least one dummy stage that outputs the dummy gate pulse.

8. The liquid crystal display device according to claim 7, wherein the dummy stage inverts the gate pulses output from the stages to generate the dummy gate pulses.

9. The liquid crystal display device according to claim 7, wherein when a first stage output a first gate pulse in response to a start signal transmitted from a timing controller, the dummy stage is also driven in response to the start signal and output the dummy gate pulse having an inverted waveform of the first gate pulse.

10. The liquid crystal display device according to claim 9, wherein when a second gate pulse is output after the first gate pulse is output, the dummy stage outputs the dummy gate pulse again.

11. A substrate comprising:

a plurality of driving electrodes configured to receive a common voltage;

a plurality of data lines configured to receive data voltages;

a plurality of gate lines configured to receive gate pulses; and

at least one dummy gate line configured to traverse the data lines and the driving electrodes and to effectively suppress variations in pixel voltage due to variations in the common voltage supplied to the driving electrodes,

said dummy gate line arranged in parallel to the gate lines and configured to transfer dummy gate pulses whenever the gate pulses are output, the dummy gate pulses having an inverted waveform of the gate pulses, whereby a coupling effect of the gate pulses that affect the driving electrodes is effectively canceled by a coupling effect of the dummy gate pulses that affect the driving electrodes due to said dummy gate line being configured to traverse all the driving electrodes.

12. The substrate of claim 11, wherein the at least one dummy gate line is at a sequential end of the plurality of gate lines having a parallel arrangement.

13. The substrate of claim 12, wherein the only one dummy gate line is an outermost side of a display area of the display.

14. The substrate of claim 11, wherein a plurality of dummy gate lines are arranged with one or more of the plurality of gate lines in between adjacent dummy gate lines.

15. A circuit comprising:

a gate driver configured to sequentially output gate pulses to gate lines during an image display period, and to output dummy gate pulses having an inverted waveform of the gate pulses to at least one dummy gate line whenever the gate pulses are output to the gate lines,

said gate driver including stages that output the gate pulses to the gate lines and at least one dummy stage that outputs the dummy gate pulses upon inverting the gate pulses output from the stages in response to a start signal transmitted from a timing controller and simultaneously applied to the stages and the at least one dummy stage.

16. The circuit of claim 15, wherein the gate driver is configured to allow a coupling effect of the gate pulses that affect driving electrodes to be effectively canceled by a coupling effect of the dummy gate pulses that affect the driving electrodes due to said dummy gate line being configured to traverse all the driving electrodes.

17. The circuit of claim 16, wherein the gate driver is implemented in a display device having touch screen capabilities.

18. The display device according to claim 15, wherein the dummy stage starts driving operation in response to the start signal.