Approximating functions
First Claim
1. A binary logic circuit for approximating a mathematical function over a predefined range as a series of linear segments, each linear segment having one of a predetermined set of fixed gradients and a corresponding base value, the binary logic circuit comprising:
- an input for receiving an input variable in the predefined range;
a plurality of logic chains each comprising;
a binary multiplier adapted to perform multiplication by a respective one of the set of fixed gradients using h-1 binary adders, where h is the minimum Hamming weight of;
a binary representation of the fixed gradient;
a trinary representation of the fixed gradient; and
a representation of the fixed gradient as a product of two binary numbers, two trinary numbers, or a binary and a trinary number;
the h-1 binary adders being logically configured to perform the multiplication using the representation of the fixed gradient having that minimum Hamming weight h; and
a binary adder adapted to add a base value to one of the input and output of the binary multiplier; and
selection logic configured to select one of the logic chains in dependence on the input variable so as to provide, for the received input variable, an approximate value of the mathematical function.
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Abstract
A binary logic circuit for approximating a mathematical function over a predefined range as a series of linear segments, each linear segment having one of a predetermined set of fixed gradients and a corresponding base value, the binary logic circuit comprising: an input for receiving an input variable in the predefined range; a plurality of logic chains each comprising: a binary multiplier adapted to perform multiplication by a respective one of the set of fixed gradients using h−1 binary adders, where h is the extended Hamming weight; and a binary adder adapted to add a base value to the input or output of the binary multiplier; and selection logic configured to select one of the logic chains in dependence on the input variable so as to provide, for the received input variable, an approximate value of the mathematical function.
13 Citations
20 Claims
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1. A binary logic circuit for approximating a mathematical function over a predefined range as a series of linear segments, each linear segment having one of a predetermined set of fixed gradients and a corresponding base value, the binary logic circuit comprising:
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an input for receiving an input variable in the predefined range; a plurality of logic chains each comprising; a binary multiplier adapted to perform multiplication by a respective one of the set of fixed gradients using h-1 binary adders, where h is the minimum Hamming weight of; a binary representation of the fixed gradient; a trinary representation of the fixed gradient; and a representation of the fixed gradient as a product of two binary numbers, two trinary numbers, or a binary and a trinary number; the h-1 binary adders being logically configured to perform the multiplication using the representation of the fixed gradient having that minimum Hamming weight h; and a binary adder adapted to add a base value to one of the input and output of the binary multiplier; and selection logic configured to select one of the logic chains in dependence on the input variable so as to provide, for the received input variable, an approximate value of the mathematical function. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A method of deriving a hardware representation of a binary logic circuit configured to approximate a mathematical function over a predefined range as a series of linear segments, the method comprising:
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fitting a plurality of linear segments to the function over the predefined range, each segment extending between a pair of break points and having a fixed gradient selected from a predetermined set of fixed gradients; determining a base value for each of the segments; and deriving a hardware representation for a binary logic circuit which comprises; for each of the plurality of linear segments; a binary multiplier adapted to perform multiplication by the selected fixed gradient of the segment using h-1 binary adders, where his the minimum Hamming weight of; a binary representation of the fixed gradient; a trinary representation of the fixed gradient; and a representation of the fixed gradient as a product of two binary numbers, two trinary numbers, or a binary and a trinary number; wherein the h-1 binary adders are logically configured to perform multiplication using the representation of the fixed gradient having the minimum Hamming weight h; and a binary adder adapted to add the determined base value to the input or output of the binary multiplier; and selection logic adapted to select, for a given input variable in the predefined range, one of the plurality of binary multipliers in dependence on the determined break points. - View Dependent Claims (14, 15, 16, 17, 18, 19)
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20. A method of manufacturing a binary logic circuit comprising deriving a hardware representation of a binary logic circuit configured to approximate a mathematical function over a predefined range as a series of linear segments by:
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fitting a plurality of linear segments to the function over the predefined range, each segment extending between a pair of break points and having a fixed gradient selected from a predetermined set of fixed gradients, determining a base value for each of the segments; and deriving a hardware representation for a binary logic circuit which comprises; for each of the plurality of linear segments; a binary multiplier adapted to perform multiplication by the selected fixed gradient of the segment using h-1 binary adders, where his the minimum Hamming weight of; a binary representation of the fixed gradient; a trinary representation of the fixed gradient; and a representation of the fixed gradient as a product of two binary numbers, two trinary numbers, or a binary and a trinary number; wherein the h-1 binary adders are logically configured to perform multiplication using the representation of the fixed gradient having the minimum Hamming weight h; and a binary adder adapted to add the determined base value to the input or output of the binary multiplier; and selection logic adapted to select, for a given input variable in the predefined range, one of the plurality of binary multipliers in dependence on the determined break points.
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Specification