Method and system for adjusting a circuit symbol

• US 9,785,734 B2
• Filed: 07/29/2015
• Issued: 10/10/2017
• Est. Priority Date: 07/29/2015
• Status: Expired due to Fees

• Current Assignee: Globalfoundries US Incorporated (GlobalFoundries, Inc.)
• Original Assignee: GlobalFoundries, Inc.
• Inventors: Jummel, Guntram
• Primary Examiner(s): DO, THUAN V
• Application Number:
  US14/812,341
• Publication Number:
  US 20170032071A1
• Time in Patent Office: 804 Days
• Field of Search: 716119
• CPC Class Codes: G06F 2111/12 Symbolic schematics
• CPC Class Codes: G06F 30/30 Circuit design
• CPC Class Codes: G06F 30/392 Floor-planning or layout, e.g. partitioning or placement
• CPC Class Codes: G06F 30/398 Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM] optical proximity correction [OPC] design processes G03F1/36
• CPC Class Codes: G06T 11/203 Drawing of straight lines or curves

Abstract

A method includes obtaining first data representing a first circuit symbol and second data representing a second circuit symbol. The first circuit symbol has a plurality of first pins having a first position vector associated therewith. The second circuit symbol has a plurality of second pins having a second position vector associated therewith, and each of the plurality of second pins corresponds to a respective one of the plurality of first pins. An adjustment transformation mapping position vectors to transform the position vectors is determined. The adjustment transformation minimizes an error measure that is based on one or more deviations. Each deviation is a deviation between a transformed position vector and the first position vector associated with one of the first pins. The transformed position vector is obtained by applying the adjustment transformation to the second position vector associated with the second pin corresponding to the first pin.

Claims

1. A method, comprising:

obtaining first data representing a first circuit symbol in a computer system, said first circuit symbol having a plurality of first pins, each first pin having a first position vector associated therewith;

obtaining second data representing a second circuit symbol in the computer system, said second circuit symbol having a plurality of second pins, each second pin having a second position vector associated therewith, each of said plurality of second pins corresponding to a respective one of said plurality of first pins; and

determining an adjustment transformation in the computer system, the adjustment transformation mapping position vectors to transformed position vectors, wherein said adjustment transformation minimizes an error measure that is based on one or more deviations, each deviation being a deviation between a transformed position vector and said first position vector associated with one of said first pins, said transformed position vector being obtainable by applying said adjustment transformation to said second position vector associated with said second pin corresponding to said first pin.

2. The method of claim 1, wherein said error measure comprises a sum over said plurality of first pins of said deviation between said transformed position vector that is obtained by applying said adjustment transformation to said second position vector associated with said second pin corresponding to said first pin and said first position vector associated with said first pin;

and

wherein said deviation between said transformed position vector and said first position vector associated with said first pin comprises a vector norm of a difference between said transformed position vector and said first position vector associated with said first pin.

3. The method of claim 2, wherein said determining of said adjustment transformation comprises calculating an adjustment orientation matrix on the basis of a first pin position matrix and a second pin position matrix, each of said first pin position matrix and said second pin position matrix having a number of rows being equal to a number of said first pins and a number of said second pins, each of said rows of said first pin position matrix comprising components of a vector that is obtained by subtracting a mean of said plurality of first position vectors from a respective one of said plurality of first position vectors, each of said rows of said second pin position matrix comprising components of a vector that is obtained by subtracting a mean of said plurality of second position vectors from a respective one of said plurality of second position vectors.

4. The method of claim 3, wherein said adjustment orientation matrix defines at least one of a rotation and a reflection.

5. The method of claim 4, wherein said calculating of said adjustment orientation matrix comprises calculating a singular value decomposition of one of said first pin position matrix and said second pin position matrix.

6. The method of claim 5, wherein said determining of said adjustment transformation further comprises determining an adjustment translation vector on the basis of said adjustment orientation matrix, said mean of said plurality of first position vectors and said mean of said plurality of second position vectors.

7. The method of claim 6, wherein said determining of said adjustment transformation further comprises:

rounding said adjustment orientation matrix to one of a plurality of predetermined constrained orientation changes; and

rounding said adjustment translation vector to a predetermined snap grid.

8. The method of claim 7, further comprising:

for each of said plurality of second pins;

calculating a transformed position vector by applying said determined adjustment transformation to said position vector associated with said second pin; and

if said calculated transformed position vector is different from said first position vector associated with said first pin corresponding to said second pin, forming third data representing one or more wire segments connecting a position represented by said transformed position vector with a position represented by said first position vector associated with said first pin corresponding to said second pin.

9. The method of claim 8, further comprising:

providing fourth data representing a circuit schematic, said circuit schematic comprising one or more instances of said first circuit symbol, each instance of said first circuit symbol having a first instance transformation associated therewith, said first instance transformation mapping position vectors in a circuit symbol master coordinate system to position vectors in a schematic coordinate system; and

replacing each instance of said first circuit symbol with a respective instance of said second circuit symbol, each instance of said second circuit symbol having a second instance transformation associated therewith, said second instance transformation mapping position vectors in said circuit symbol master coordinate system to position vectors in said schematic coordinate system;

wherein the replacement of each instance of said first circuit symbol with the respective instance of said second circuit symbol comprises, for each instance of said first circuit symbol, determining said second instance transformation associated with said respective instance of said second circuit symbol.

10. The method of claim 9, wherein each of said first position vectors is a position vector in said circuit symbol master coordinate system that defines a position of said first pin associated with said first position vector in said circuit symbol master coordinate system, and

wherein each of said second position vectors is a position vector in said circuit symbol master coordinate system that defines a position of said second pin associated with said second position vector in said circuit symbol master coordinate system.

11. The method of claim 10, wherein said determining of said second instance transformation comprises concatenating said adjustment transformation and said first instance transformation, so that said second instance transformation corresponds to a combination of said adjustment transformation and said first instance transformation wherein said adjustment transformation is performed before said first instance transformation.

12. The method of claim 11, further comprising:

for each instance of said first circuit symbol, applying said first instance transformation associated with said instance of said first circuit symbol to each of said third data representing one or more wire segments to obtain one or more wire segments adjacent said respective instance of said second circuit symbol, and including said one or more wire segments into said circuit schematic represented by said fourth data.

13. The method of claim 12, further comprising:

before the replacement of each of said instances of said first circuit symbol with a respective instance of said second circuit symbol, extracting a first netlist from said circuit schematic;

after the replacement of each of said instances of said first circuit symbol with a respective instance of said second circuit symbol, extracting a second netlist from said circuit schematic; and

comparing said first netlist and said second netlist to determine if a connectivity of an electric circuit represented by said circuit schematic has been affected by the replacement of each of said instances of said first circuit symbol with a respective instance of said second circuit symbol.

14. The method of claim 13, wherein said first circuit symbol comprises an instance master symbol for a circuit element of a first process design kit, and said second circuit symbol comprises an instance master symbol for a circuit element of a second process design kit.

15. The method of claim 9, wherein said obtaining of said first and second data, and said determination of said adjustment transformation are performed for each instance of said first circuit symbol;

wherein each of said first position vectors is a position vector in said schematic coordinate system obtained by applying said instance transformation associated with said instance of said first circuit symbol to a position vector in said circuit master coordinate system that defines a position of said first pin in said circuit symbol master coordinate system;

wherein each of said second position vectors is a position vector in said circuit symbol master coordinate system that defines a position of said second pin associated with said second position vector in a circuit symbol master coordinate system; and

wherein said determining of said second instance transformation comprises providing said adjustment transformation as said second instance transformation.

16. A method, comprising:

obtaining first data representing a first circuit symbol in a computer system, said first circuit symbol having a plurality of first pins, each first pin having a first position vector associated therewith;

obtaining second data representing a second circuit symbol in the computer system, said second circuit symbol having a plurality of second pins, each second pin having a second position vector associated therewith, each of said plurality of second pins corresponding to a respective one of said plurality of first pins;

determining an adjustment transformation in the computer system, the adjustment transformation mapping position vectors to transformed position vectors, wherein said determining of said adjustment transformation comprises calculating an adjustment orientation matrix, said calculating of said adjustment orientation matrix comprising;

forming a first pin position matrix and a second pin position matrix, each of said first pin position matrix and said second pin position matrix having a number of rows that is one of equal to and greater than a number of said plurality of first pins and a number of said plurality of second pins, each of said rows of said first pin position matrix comprising components of a respective vector that is obtained by subtracting a mean of a first set of position vectors that includes said plurality of first position vectors and, if the number of rows of said first pin position matrix and said second pin position matrix is greater than the number of said plurality of first pins and the number of said plurality of second pins, at least one duplicate of at least one of said plurality of first position vectors from a respective member of the first set of position vectors, each of said rows of said second pin position matrix comprising components of a respective vector that is obtained by subtracting a mean of a second set of position vectors that includes said plurality of second position vectors and, if the number of rows of said first pin position matrix and said second pin position matrix is greater than the number of said plurality of first pins and the number of said plurality of second pins, at least one duplicate of at least one of said second position vectors, from a respective member of said second set of position vectors;

calculating a pseudoinverse of one of said first pin position matrix and said second pin position matrix; and

multiplying said pseudoinverse of one of said first pin position matrix and said second pin position matrix with the other of said first pin position matrix and said second pin position matrix.

17. The method of claim 16, wherein calculating said pseudoinverse of said one of said first pin position matrix and said second pin position matrix comprises calculating a singular value decomposition of said one of said first pin position matrix and said second pin position matrix.

18. The method of claim 17, wherein said determining of said adjustment transformation further comprises calculating an adjustment translation vector by subtracting a product of said adjustment orientation matrix and said mean of said plurality of second position vectors from said mean of said plurality of first position vectors.

19. A system, comprising:

a memory, said memory comprising first data representing a first circuit symbol, said first circuit symbol having a plurality of first pins, each of said plurality of first pins having a first position vector associated therewith, and second data representing a second circuit symbol, said second circuit symbol having a plurality of second pins, each of said plurality of second pins having a second position vector associated therewith, each of said plurality of second pins corresponding to a respective one of said plurality of first pins; and

an adjustment transformation calculator determining an adjustment transformation mapping position vectors to transformed position vectors, wherein said adjustment transformation minimizes an error measure that is based on one or more deviations, each deviation being a deviation between a transformed position vector and said first position vector associated with one of said first pins, said transformed position vector being obtainable by applying said adjustment transformation to said second position vector associated with said second pin corresponding to said first pin.

20. A system, comprising:

means for obtaining first data representing a first circuit symbol, said first circuit symbol having a plurality of first pins, each of said plurality of first pins having a first position vector associated therewith;

means for obtaining second data representing a second circuit symbol, said second circuit symbol having a plurality of second pins, each of said plurality of second pins having a second position vector associated therewith, each of said plurality of second pins corresponding to a respective one of said plurality of first pins; and

means for determining an adjustment transformation mapping position vectors to transformed position vectors, wherein said adjustment transformation minimizes an error measure that is based on one or more deviations, each deviation being a deviation between a transformed position vector and said first position vector associated with one of said first pins, said transformed position vector being obtainable by applying said adjustment transformation to said second position vector associated with said second pin corresponding to said first pin.