Power saving control apparatus and method

• US 9,787,716 B2
• Filed: 11/12/2008
• Issued: 10/10/2017
• Est. Priority Date: 11/16/2007
• Status: Active Grant

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Mera, Keisuke, Doi, Yusuke, Sakamoto, Takafumi, Umeda, Toshiyuki, Otaka, Shoji
• Primary Examiner(s): Chen, Eric
• Application Number:
  US12/269,523
• Publication Number:
  US 20090132836A1
• Time in Patent Office: 3,254 Days
• CPC Class Codes: H04L 63/08 for authentication of entities cryptographic mechanisms or cryptographic arrangements for entity authentication H04L9/32
• CPC Class Codes: H04L 63/166 at the transport layer
• CPC Class Codes: H04W 12/06 Authentication
• CPC Class Codes: H04W 52/0229 where the received signal is a wanted signal
• CPC Class Codes: Y02D 30/70 in wireless communication networks

Abstract

A power-saving control apparatus includes a memory storing first to Nth different authentication codes, determines, every time a signal including an authentication code is received, whether the authentication code in the received signal is a valid code which matches one of the authentication codes in the memory, outputs an operation signal to a main apparatus when the authentication code in the received signal is determined to be the valid code, and generates a new authentication code, when (a) the number of times the authentication code in each received signal matches a first authentication code of the authentication codes in the memory is equal to a predetermined value or (b) the authentication code in the received signal matches a second or subsequent authentication code of the authentication codes in the memory, to delete one of the authentication codes in the memory, and to store the new authentication code in the memory.

Claims

1. A power-saving control apparatus comprising:

a first memory to store first to Nth (N is a natural number not less than two) different first authentication codes;

a second memory to store first to Mth (M is a natural number not less than two) different second authentication codes;

a reception circuit to receive (a) a first radio operation signal including a first authentication code and a second authentication code or (b) a second radio operation signal including the first authentication code and a third radio operation signal including the second authentication code, the first authentication code being included in the first authentication codes, the second authentication code being included in the second authentication codes;

a first determination circuit to determine, every time the reception circuit receives the first radio operation signal or both the second radio operation signals and the third radio operation signal, whether the first authentication code in the first radio operation signal or the second radio operation signal is a first valid code which matches one of the first authentication codes stored in the first memory;

a second determination circuit to be started when the first determination circuit determines that the first authentication code in the first radio operation signal or the second radio operation signal is the first valid code, and to determine whether the second authentication code in the first radio operation signal or the third radio operation signal received is a second valid code which matches one of the second authentication codes stored in the second memory;

an output circuit to output an operation signal to a main apparatus when the second determination circuit determines that the second authentication code in the first radio operation signal or the third radio operation signal is the second valid code;

a first control circuit to generate a new second authentication code, every time the second determination circuit determines that the second authentication code in the first radio operation signal or the third radio operation signal received is the second valid code, to delete at least one of the second authentication codes stored in the second memory, the at least one of the second authentication codes being the second valid code, and to store the new second authentication code in the second memory;

a counter circuit to count the number of times the first authentication code in the first radio operation signal or the second radio operation signal received matches a first one of the first authentication codes stored in the first memory; and

a second control circuit to generate a new first authentication code, when (a) a value of the counter circuit is equal to a predetermined set value or (b) the first authentication code in the first radio operation signal or the second radio operation signal matches a second or subsequent one of the first authentication codes stored in the first memory, to delete at least one of the first authentication codes stored in the first memory, and to store the new first authentication code in the first memory,

wherein when a replay attack is taken, the first determination circuit determines that the first authentication code in the first radio operation signal or the second radio operation signal received is the first valid code and the second determination circuit determines that the second authentication code in the first radio operation signal or the third radio operation signal received is an invalid code which is not included in the second authentication codes stored in the second memory.

2. The apparatus according to claim 1, wherein the second control circuit generates the new first authentication code, when the first determination circuit determines that the first authentication code in the first radio operation signal or the second radio operation signal received is the first valid code and the second determination circuit determines that the second authentication code in the first radio operation signal or the third radio operation signal received is an invalid code which is not included in the second authentication codes stored in the second memory, to delete at least one of the first authentication codes stored in the first memory, and to store the new first authentication code in the first memory.

3. The apparatus according to claim 1, wherein the second control circuit deletes the first one of the first authentication codes from the first memory.

4. A power-saving control apparatus comprising:

a first memory to store first to Nth (N is a natural number not less than two) different first authentication codes;

a second memory to store first to Mth (M is a natural number not less than two) different second authentication codes;

a reception circuit to receive (a) a first radio operation signal including a first authentication code and a second authentication code or (b) a second radio operation signal including the first authentication code and a third radio operation signal including the second authentication code, the first authentication code being included in the first authentication codes, the second authentication code being included in the second authentication codes;

a first determination circuit to determine, every time the reception circuit receives the first radio operation signal or both the second radio operation signals and the third radio operation signal, whether the first authentication code in the first radio operation signal or the second radio operation signal is a first valid code which matches one of the first authentication codes stored in the first memory;

a second determination circuit to be started when the first determination circuit determines that the first authentication code in the first radio operation signal or the second radio operation signal is the first valid code, and to determine whether the second authentication code in the first radio operation signal or the third radio operation signal received is a second valid code which matches one of the second authentication codes stored in the second memory;

an output circuit to output an operation signal to a main apparatus when the second determination circuit determines that the second authentication code in the first radio operation signal or the third radio operation signal is the second valid code;

a first control circuit to generate a new second authentication code, every time the second determination circuit determines that the second authentication code in the first radio operation signal or the third radio operation signal received is the second valid code, to delete at least one of the second authentication codes stored in the second memory, the at least one of the second authentication codes being the second valid code, and to store the new second authentication code in the second memory;

a counter circuit to count the number of times the first authentication code in the first radio operation signal or the second radio operation signal received matches a first one of the first authentication codes stored in the first memory; and

a second control circuit to generate a new first authentication code, when (a) a value of the counter circuit is equal to a predetermined set value or (b) the first authentication code in the first radio operation signal or the second radio operation signal matches a second or subsequent one of the first authentication codes stored in the first memory, to delete at least one of the first authentication codes stored in the first memory, and to store the new first authentication code in the first memory;

wherein when a replay attack is taken, the first determination circuit determines that the first authentication code in the first radio operation signal or the second radio operation signal received is the first valid code and the second determination circuit determines that the second authentication code in the first radio operation signal or the third radio operation signal received is an invalid code which is not included in the second authentication codes stored in the second memory, and

the reception circuit includes

an antenna,

a rectifier to rectify the first radio operation signal or the second radio operation signal received by the antenna, to generate a rectified voltage, and

a starting circuit to generate a current upon receiving the rectified voltage, to amplify the current, and to output a voltage signal corresponding to a magnitude of the current amplified.

5. A power-saving control method used for a power-saving control apparatus including

a reception circuit to receive (a) a first radio operation signal including a first authentication code and a second authentication code or (b) a second radio operation signal including the first authentication code and a third radio operation signal including the second authentication code, the first authentication code being included in the first authentication codes, the second authentication code being included in the second authentication codes;

a first memory to store first to Nth (N is a natural number not less than two) different first authentication codes;

a second memory to store first to Mth (M is a natural number not less than two) different second authentication codes;

a first determination circuit to determine, every time the reception circuit receives the first radio operation signal or both the second radio operation signals and the third radio operation signal, whether the first authentication code in the first radio operation signal or the second radio operation signal received is a first valid code which matches one of the first authentication codes stored in the first memory;

a second determination circuit to determine whether the second authentication code in the first radio operation signal or the third radio operation signal received is a second valid code which matches one of the second authentication codes stored in the second memory; and

a control circuit to perform control for outputting an operation signal to a main apparatus, the method comprising;

receiving the first radio operation signal or the second radio operation signal by the reception circuit;

determining, by the first determination circuit, whether the first authentication code in the first radio operation signal or the second radio operation signal received is the first valid code;

starting the second determination circuit and the control circuit by the first determination circuit when the first authentication code in the first radio operation signal or the second radio operation signal received is determined to be the first valid code;

determining, by the second determination circuit, whether the second authentication code in the first radio operation signal or the third radio operation signal received is the second valid code;

outputting, by the control circuit, the operation signal to the main apparatus when the second authentication code in the first radio operation signal or the third radio operation signal received is determined to be the second valid code;

generating, by the control circuit, a new second authentication code, when the second authentication code in the first radio operation signal or the third radio operation signal received is determined to be the second valid code, to delete at least one of the second authentication codes stored in the second memory, the at least one of the second authentication codes being the second valid code, and to store the new second authentication code in the second memory;

incrementing, by the control circuit, a counter value by one when the first authentication code in the first radio operation signal or the second radio operation signal received matches a first one of the first authentication codes stored in the first memory; and

generating, by the control circuit, a new first authentication code when (a) the counter value is equal to a predetermined set value or (b) the first authentication code in the first radio operation signal or the second radio operation signal received matches a second or subsequent authentication code of the authentication codes stored in the first memory, or (c) the first authentication code in the first radio operation signal or the second radio operation signal received is determined to be the first valid code and the second authentication code in the first radio operation signal or the third radio operation signal received is determined to be an invalid code which is not included in the second authentication codes stored in the second memory, to delete at least one of the first authentication codes stored in the first memory, and to store the new first authentication code in the first memory,

wherein when a replay attack is taken, the first determination circuit determines that the first authentication code in the first radio operation signal or the second radio operation signal received is the first valid code and the second determination circuit determines that the second authentication code in the first radio operation signal or the third radio operation signal received is an invalid code which is not included in the second authentication codes stored in the second memory.