Analytics assisted encoding

• US 9,787,991 B2
• Filed: 08/15/2016
• Issued: 10/10/2017
• Est. Priority Date: 09/06/2011
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Rodriguez, Jose M., Mishra, Animesh, Doddapuneni, Naveen
• Primary Examiner(s): Alavi, Amir
• Application Number:
  US15/236,641
• Publication Number:
  US 20160373757A1
• Time in Patent Office: 421 Days
• CPC Class Codes: G06T 9/00 Image coding bandwidth or redundancy reduction for static pictures H04N1/41; coding or decoding of static colour picture signals H04N1/64; methods or arrangements for coding, decoding, compressing or decompressing digital video signals H04N19/00
• CPC Class Codes: G06V 20/52 Surveillance or monitoring of activities, e.g. for recognising suspicious objects recognising microscopic objects G06V20/69
• CPC Class Codes: H04N 19/132 Sampling, masking or truncation of coding units, e.g. adaptive resampling, frame skipping, frame interpolation or high-frequency transform coefficient masking
• CPC Class Codes: H04N 19/134 characterised by the element, parameter or criterion affecting or controlling the adaptive coding
• CPC Class Codes: H04N 19/137 Motion inside a coding unit, e.g. average field, frame or block difference
• CPC Class Codes: H04N 19/139 Analysis of motion vectors, e.g. their magnitude, direction, variance or reliability
• CPC Class Codes: H04N 19/156 Availability of hardware or computational resources, e.g. encoding based on power-saving criteria
• CPC Class Codes: H04N 19/162 User input
• CPC Class Codes: H04N 19/17 the unit being an image region, e.g. an object
• CPC Class Codes: H04N 19/172 the region being a picture, frame or field
• CPC Class Codes: H04N 19/176 the region being a block, e.g. a macroblock
• CPC Class Codes: H04N 19/46 Embedding additional information in the video signal during the compression process H04N19/517, H04N19/68, H04N19/70 take precedence
• CPC Class Codes: H04N 19/51 Motion estimation or motion compensation
• CPC Class Codes: H04N 19/90 using coding techniques not provided for in groups H04N19/10-H04N19/85, e.g. fractals

Abstract

Video analytics may be used to assist video encoding by selectively encoding only portions of a frame and using, instead, previously encoded portions. Previously encoded portions may be used when succeeding frames have a level of motion less than a threshold. In such case, all or part of succeeding frames may not be encoded, increasing bandwidth and speed in some embodiments.

Claims

1. A method comprising:

identifying a first portion of a frame having motion;

identifying a second portion of the frame having lower motion than said first portion;

encoding the first portion without encoding said second portion; and

for said second portion, reusing encoding for a corresponding portion from a previous frame.

2. The method of claim 1 wherein identifying a first or second portion includes using video analytics including using at least one of erosion, dilation, or convolution.

3. The method of claim 1 including receiving a plurality of simultaneous input video channels.

4. The method of claim 3 including copying each of said channels.

5. The method of claim 4 including storing one copy on an external memory.

6. The method of claim 5 including storing another copy on an internal memory.

7. The method of claim 6 including storing on said internal memory using two dimensional addressing.

8. The method of claim 7 including specifying a point in said internal memory and an extent in two dimensions.

9. The method of claim 5 including accessing said external memory for encoding.

10. The method of claim 9 including using one copy for encoding and the other copy for video analytics.

11. A non-transitory computer readable medium storing instructions to enable a computer processor to:

identify a first portion of a frame having motion;

identifying a second portion of the frame having lower motion than said first portion;

encode the first portion without encoding said second portion; and

for said second portion, reusing coding for a corresponding portion from a previous frame.

12. The medium of claim 11 further storing instructions to use video analytics to identify the first or second portion by using at least one of erosion, dilation, or convolution.

13. The medium of claim 11 further storing instructions to receive a plurality of simultaneous input video channels.

14. The medium of claim 13 further storing instructions to copy each of said channels.

15. The medium of claim 14 further storing instructions to store one copy on an external memory.

16. The medium of claim 15 further storing instructions to store another copy on an internal memory.

17. The medium of claim 16 further storing instructions to store on said internal memory using two dimensional addressing.

18. The medium of claim 17 further storing instructions to specify a point in said internal memory and an extent in two dimensions.

19. The medium of claim 15 further storing instructions to access said external memory for encoding.

20. The medium of claim 19 further storing instructions to use one copy for encoding and the other copy for video analytics.

21. An integrated circuit comprising:

a video capture interface;

a main memory coupled to said video capture interface;

a pixel pipeline unit coupled to said main memory; and

a video encoder coupled to said pixel pipeline unit and said video capture interface, said video encoder to analyze the frame to identify a first portion of a frame having motion, identify a second portion of the frame having lower motion than said first portion, encode the first portion without encoding said second portion and for said second portion, reusing coding for a corresponding portion from a previous frame.

22. The circuit of claim 21 wherein said circuit is an embedded dynamic random access memory.

23. The circuit of claim 22, said encoder to use erosion, dilation, or convolution units in said pixel pipeline unit.

24. The circuit of claim 21, said video capture interface to receive a plurality of simultaneous input video channels and copy each of said input video channels.

25. The circuit of claim 24, said circuit to store one copy of said input video channels on an external memory.

26. The circuit of claim 25, said video capture interface to store another copy on said main memory.

27. The circuit of claim 26 wherein said video capture interface to store one copy on said main memory using two dimensional addressing.

28. The circuit of claim 27, said video capture interface to specify a point in said internal memory and an extent in two dimensions.

29. The circuit of claim 25, said encoder to access an external memory storing information to be encoded.

30. The circuit of claim 29, said encoder to use one of said copies and said pixel pipeline unit to use the other of said copies.