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Power integrated circuit with autonomous limit checking of ADC channel measurements

  • US 9,791,482 B1
  • Filed: 05/30/2017
  • Issued: 10/17/2017
  • Est. Priority Date: 06/25/2016
  • Status: Active Grant
First Claim
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1. An integrated circuit, comprising:

  • a first terminal;

    a second terminal;

    a current switch circuit that can receive a current of up to a maximum input current from the first terminal, wherein the current switch circuit can conduct a through-current from the first terminal, through the current switch circuit to the second terminal with a resistance, and wherein the current switch circuit outputs a current sense voltage whose magnitude is indicative of a magnitude of a current flowing through the current switch circuit;

    an input analog multiplexer circuit having a first analog input lead, a second analog input lead, at least one select input lead, and an analog output lead, wherein the first analog input lead is coupled to receive the current sense voltage, and wherein the second analog input lead is coupled to receive an input voltage;

    an Analog-to-Digital Converter (ADC) that is coupled to the output lead of the input analog multiplexer circuit, wherein the ADC is adapted to output a first digital value indicative of a magnitude of the current flowing through the current switch circuit, and wherein the ADC is adapted to output a second digital value indicative of a magnitude of the input voltage;

    a first comparator circuit adapted to compare the first digital value to a first limit value and to output a first comparison signal indicative of the comparison;

    a second comparator circuit adapted to compare the second digital value to a second limit value and to output a second comparison signal indicative of the comparison; and

    a third terminal adapted to output a flag signal, wherein the flag signal is indicative of a condition in which either the first comparison signal is asserted or the second comparison signal is asserted.

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