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Bad column handling in flash memory

  • US 9,792,174 B2
  • Filed: 08/31/2015
  • Issued: 10/17/2017
  • Est. Priority Date: 12/04/2012
  • Status: Active Grant
First Claim
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1. A multi-plane flash memory array comprising:

  • a first plane of flash memory cells comprising first non-redundant columns and first redundant columns, the first non-redundant columns having first bad columns, wherein a number of the first bad columns is less than or equal to a number of the first redundant columns, and wherein each of the first redundant columns stores replacement data for one of the first bad columns; and

    a second plane of flash memory cells comprising second non-redundant columns and second redundant columns, the second non-redundant columns having second bad columns, wherein a number of the second bad columns is greater than a number of the second redundant columns, and wherein at least a portion of the second redundant columns stores Error Correction Code (ECC) encoded data and a remaining portion of the second redundant columns stores replacement data for a portion of the second bad columns.

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