Gate driving circuit and display apparatus

• US 9,793,006 B2
• Filed: 07/30/2014
• Issued: 10/17/2017
• Est. Priority Date: 11/27/2013
• Status: Active Grant

• Current Assignee: BOE Technology Group Co., Ltd., Hefei BOE Optoelectronics Technology Company Limited (BOE Technology Group Co., Ltd.)
• Original Assignee: BOE Technology Group Co., Ltd., Hefei BOE Optoelectronics Technology Company Limited (BOE Technology Group Co., Ltd.)
• Inventors: Zheng, Liangliang, He, Jian
• Primary Examiner(s): Mummalaneni, Nalini
• Application Number:
  US14/422,917
• Publication Number:
  US 20160049208A1
• Time in Patent Office: 1,175 Days
• CPC Class Codes: G09G 2300/0426 Layout of electrodes and connections
• CPC Class Codes: G09G 2310/0267 Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays
• CPC Class Codes: G09G 2310/0286 Details of a shift registers arranged for use in a driving circuit
• CPC Class Codes: G09G 2310/04 Partial updating of the display screen
• CPC Class Codes: G09G 2310/08 Details of timing specific for flat panels, other than clock recovery
• CPC Class Codes: G09G 2330/021 Power management, e.g. power saving
• CPC Class Codes: G09G 3/20 for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
• CPC Class Codes: G09G 3/3674 Details of drivers for scan electrodes
• CPC Class Codes: G09G 3/3677 suitable for active matrices only
• CPC Class Codes: G11C 19/287 Organisation of a multiplicity of shift registers

Abstract

The present disclosure provides a gate driving circuit and a display apparatus, wherein the gate driving circuit comprises a shift register (10) including a plurality of shift register units connected with each other sequentially, and the gate driving circuit further comprises: a first strobe module (20) and/or a second strobe module (30); the first strobe module (20), connected to a gate scanning trigger signal line (STV) and strobe signal lines (CS0, CS1); the second strobe module (30), connected to the strobe signal lines. With incorporation of the first strobe module (20), a gate scanning trigger signal on a gate scanning trigger signal line (STV) is supplied to a predetermined shift register unit according to strobe signals provided on the strobe signal lines (CS0, CS1); and the second strobe module (30), which is configured to cut off communication between the predetermined shift register unit and its previous stage of shift register unit according to the strobe signals provided on the strobe signal lines (CS0, CS1), so that the shift register is turned off from the predetermined shift register unit, and thus it can be achieved on a liquid crystal display panel that the gate signal(s) in a black-scan area are selectively turned off in a partial display mode, thus power consumption of the whole display panel being reduced.

Claims

1. A gate driving circuit comprising a shift register including a plurality of shift register units connected with each other sequentially, the gate driving circuit further comprising:

a first strobe module, connected to a gate scanning trigger signal line and strobe signal lines, is configured to provide a gate scanning trigger signal on the gate scanning trigger signal line to a first predetermined shift register unit according to strobe signals provided by the strobe signal lines, so that the shift register operates from the first predetermined shift register unit; and

a second strobe module, connected to the strobe signal lines, is configured to cut off communication between a second predetermined shift register unit other than the first stage of shift register unit and a stage of shift register unit previous to the second predetermined shift register unit according to the strobe signals provided by the strobe signal lines, so that the shift register is turned off from the second predetermined shift register unit;

wherein the first strobe module comprises a first pulse signal strobe and at least one OR gate,

input terminals of the first pulse signal strobe are connected with the gate scanning trigger signal and the strobe signals respectively, a first output terminal of the first pulse signal strobe is connected with an input terminal of a first stage of shift register unit in the shift register, and a second output terminal of the first pulse signal strobe is connected with a first input terminal of the OR gate;

a second input terminal of the OR gate is connected with an output terminal of the stage of shift register unit previous to the first predetermined shift register unit other than the first stage of shift register unit, and an output terminal of the OR gate is connected with an input terminal of the first predetermined shift register unit.

2. The gate driving circuit of claim 1, wherein the second strobe module comprises:

a second pulse signal strobe, input terminals thereof are connected with the strobe signals and the output terminal of the stage of shift register unit previous to the second predetermined shift register unit, respectively, and an output terminal of the second pulse signal strobe is connected with the input terminal of the second predetermined shift register unit.

3. The gate driving circuit of claim 2, wherein the number of the strobe signals is N, the number of the output terminals of the first pulse signal strobe is M, the number of OR gates is at most M−

1, and the number of the output terminals of the second pulse signal strobe is L, wherein M≦

2^N, L≦

2^N, and L, M and N are all natural numbers.

4. The gate driving circuit of claim 3, wherein the strobe signals comprises a first strobe signal and a second strobe signal, when N=2, M=4, L=3.

5. The gate driving circuit of claim 4, wherein, when both of the first strobe signal and the second strobe signal are at a low level, the first output terminal of the first pulse signal strobe is activated, the second output terminal, the third output terminal and the fourth output terminal output a low level, and the first output terminal, the second output terminal and the third output terminal of the second pulse signal strobe are activated.

6. The gate driving circuit of claim 4, wherein, when the first strobe signal is at a low level while the second strobe signal is at a high level, the second output terminal of the first pulse signal strobe is activated, the first output terminal, the third output terminal and the fourth output terminal output a low level, and the first output terminal and the second output terminal of the second pulse signal strobe are both activated but the third output terminal thereof is not activated.

7. The gate driving circuit of claim 4, wherein, when the first strobe signal is at a high level and the second strobe signal is at a low level, the third output terminal of the first pulse signal strobe is activated, the first output terminal, the second output terminal and the fourth output terminal output a low level;

the first output terminal of the second pulse signal strobe is activated, and neither of the second output terminal and the third output terminal is activated.

8. The gate driving circuit of claim 4, wherein, when both of the first strobe signal and the second strobe signal are at a high level, the fourth output terminal of the first pulse signal strobe is activated, the first output terminal, the second output terminal and the third output terminal output a low level, and none of the first output terminal, the second output terminal and the third output terminal of the second pulse signal strobe is activated.

9. The gate driving circuit of claim 1, wherein only one of the output terminals of the first pulse signal strobe is activated at a same moment.

10. The gate driving circuit of claim 1, wherein except for the first stage of shift register unit, an output terminal of each stage of shift register unit in the shift register is connected with a corresponding reset signal input terminal of a previous stage of shift register unit, and is configured to reset the previous stage of shift register unit;

and

an input terminal of each stage of shift register unit in the shift register is connected with a gate driving clock signal.

11. A display apparatus comprising a plurality of gate lines and the gate driving circuit of claim 1, and the output terminals of the respective shift register units are connected with respective gate lines one-to-one.

12. The display apparatus of claim 11, wherein the second strobe module comprises:

a second pulse signal strobe, input terminals thereof are connected with the strobe signals and the output terminal of the stage of shift register unit previous to the second predetermined shift register unit, respectively, and an output terminal of the second pulse signal strobe is connected with the input terminal of the second predetermined shift register unit.

13. The display apparatus of claim 12, wherein the number of the strobe signals is N, the number of the output terminals of the first pulse signal strobe is M, the number of OR gates is at most M−

1, and the number of the output terminals of the second pulse signal strobe is L, wherein M≦

2^N, L≦

2^N, and L, M and N are all natural numbers.

14. The display apparatus of claim 13, wherein the strobe signals comprises a first strobe signal and a second strobe signal, when N=2, M=4, L=3.

15. The display apparatus of claim 11, wherein only one of the output terminals of the first pulse signal strobe is activated at a same moment.

16. The display apparatus of claim 11, wherein except for the first stage of shift register unit, an output terminal of each stage of shift register unit in the shift register is connected with a corresponding reset signal input terminal of a previous stage of shift register unit, and is configured to reset the previous stage of shift register unit;

and

an input terminal of each stage of shift register unit in the shift register is connected with a gate driving clock signal.