Method of manufacturing semiconductor unit and the semiconductor unit

• US 9,793,311 B2
• Filed: 07/03/2016
• Issued: 10/17/2017
• Est. Priority Date: 09/10/2015
• Status: Active Grant

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: Renesas Electronics Corporation
• Inventors: Kimura, Masatoshi
• Primary Examiner(s): MENZ, LAURA MARY
• Application Number:
  US15/201,485
• Publication Number:
  US 20170077165A1
• Time in Patent Office: 471 Days
• CPC Class Codes: H01L 27/14607 Geometry of the photosensitive area
• CPC Class Codes: H01L 27/1461 characterised by the photosensitive area
• CPC Class Codes: H01L 27/14621 Colour filter arrangements
• CPC Class Codes: H01L 27/14627 Microlenses
• CPC Class Codes: H01L 27/1463 Pixel isolation structures
• CPC Class Codes: H01L 27/14643 Photodiode arrays; MOS imagers
• CPC Class Codes: H01L 27/14689 MOS based technologies

Abstract

In a solid-state imaging device including a plurality of pixels each pixel including a plurality of photodiodes, it is prevented that an incidence angle of incident light on the solid-state imaging device becomes large in a pixel in an end of the solid-state imaging device, causing a difference in output between the two photodiodes in the pixel, and thus autofocus detection accuracy is deteriorated. Photodiodes extending in a longitudinal direction of a pixel allay section are provided in each pixel. The photodiodes in the pixel are arranged in a direction orthogonal to the longitudinal direction of the pixel allay section.

Claims

1. A semiconductor unit including a solid-state imaging device including pixels each including a first photodiode and a second photodiode, the semiconductor unit comprising:

a semiconductor substrate;

a pixel array section extending in a first direction along a main surface of the semiconductor substrate over the main surface of the semiconductor substrate;

the pixels provided in the pixel array section;

a first semiconductor region having a first conductivity type and a second semiconductor region having the first conductivity type arranged separately from each other in the first direction in the main surface of the semiconductor substrate in each of the pixels;

the first photodiode including the first semiconductor region;

the second photodiode including the second semiconductor region; and

a third semiconductor region having a second conductivity type different from the first conductivity type provided in the main surface of the semiconductor substrate and between the first photodiode and the second photodiode,

wherein a first pixel among the pixels is located near an end of the pixel array section in the first direction, and width of the first photodiode in the first pixel is smaller than width in the first direction of the second photodiode in the first pixel.

2. The semiconductor unit according to claim 1, wherein the center in the first direction of the third semiconductor region in the first pixel is located closer to the end than the center in the first direction of a region including the first photodiode and the second photodiode in the first pixel.

3. The semiconductor unit according to claim 1, wherein the first photodiode and the third semiconductor region in the first pixel are in contact with each other in plan view, and the second photodiode and the third semiconductor region in the first pixel are in contact with each other in plan view.

4. The semiconductor unit according to claim 1, further comprising an element isolating region surrounding the first photodiode and the second photodiode of each of the pixels in plan view,

wherein a shortest distance in the first direction between the first photodiode provided closer to the end than the second photodiode in the first pixel and the element isolating region is smaller than a shortest distance in the first direction between the first photodiode provided closer to the end than the second photodiode in a second pixel among the pixels, the second pixel being located in a central portion in the first direction of the pixel array section, and the element isolating region.

5. The semiconductor unit according to claim 4, further comprising:

a well region having the second conductivity type in contact with the first semiconductor region and the second semiconductor region so as to cover the first semiconductor region and the second semiconductor region in the semiconductor substrate; and

a fourth semiconductor region having the second conductivity type provided in a surface of the semiconductor substrate in contact with the element isolating region,

wherein impurity concentration of the fourth semiconductor region is higher than impurity concentration of the well region, and

wherein the first photodiode in the first pixel is in contact with the fourth semiconductor region in plan view.