Transparent user mode scheduling on traditional threading systems
First Claim
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1. A system, comprising:
- a processor; and
memory communicatively coupled to the processor, the memory comprising;
a register configured to store a pointer to enable creation of a user mode schedulable (UMS) thread based on a standard thread by allowing a user portion and a kernel portion of the standard thread to be independently assigned to the processor;
a context holder to store privileged hardware states of the UMS thread; and
a user mode scheduler executed by the processor to replace first context information of a kernel portion of a primary thread with second context information from a kernel portion of the UMS thread,wherein the primary thread is executed by the processor to enter kernel mode via a system call and to use the pointer to load the stored privileged hardware states into the kernel portion of the primary thread after the replacement of the first context information with the second context information.
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Abstract
Embodiments for performing cooperative user mode scheduling between user mode schedulable (UMS) threads and primary threads are disclosed. In accordance with one embodiment, privileged hardware states are transferred from a kernel portion of a UMS thread to a kernel portion of a primary thread.
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Citations
14 Claims
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1. A system, comprising:
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a processor; and memory communicatively coupled to the processor, the memory comprising; a register configured to store a pointer to enable creation of a user mode schedulable (UMS) thread based on a standard thread by allowing a user portion and a kernel portion of the standard thread to be independently assigned to the processor; a context holder to store privileged hardware states of the UMS thread; and a user mode scheduler executed by the processor to replace first context information of a kernel portion of a primary thread with second context information from a kernel portion of the UMS thread, wherein the primary thread is executed by the processor to enter kernel mode via a system call and to use the pointer to load the stored privileged hardware states into the kernel portion of the primary thread after the replacement of the first context information with the second context information. - View Dependent Claims (2, 3, 4)
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5. A method comprising:
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using a pointer, stored in a register, to create a user mode schedulable (UMS) thread based on a standard thread by allowing a user portion and a kernel portion of the standard thread to be independently assigned to a processor; storing privileged hardware states of the UMS thread; replacing first context information of a kernel portion of a primary thread with second context information from a kernel portion of the UMS thread; causing the primary thread to enter kernel mode via a system call; and loading the stored privileged hardware states into the kernel portion of the primary thread using the pointer after replacing the first context information with the second context information. - View Dependent Claims (6, 7, 8, 9)
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10. A system comprising:
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one or more processors; and memory communicatively coupled to the one or more processors, the memory configured to store executable instructions that, when executed by the one or more processors, cause the one or more processors to perform operations comprising; creating a user mode schedulable (UMS) thread based on a standard thread using a pointer stored in a register by allowing a user portion and a kernel portion of the standard thread to be independently assigned to the one or more processors, storing privileged hardware states of the UMS thread, replacing first context information of a kernel portion of a primary thread with second context information from a kernel portion of the UMS thread, causing the primary thread to enter kernel mode via a system call, and loading the stored privileged hardware states into the kernel portion of the primary thread using the pointer after replacing the first context information with the second context information. - View Dependent Claims (11, 12, 13, 14)
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Specification