×

Managing a cache on storage devices supporting compression

  • US 9,798,655 B2
  • Filed: 03/28/2014
  • Issued: 10/24/2017
  • Est. Priority Date: 09/20/2013
  • Status: Active Grant
First Claim
Patent Images

1. A method, comprising steps of:

  • writing data in memory blocks of a flash memory device that exposes a logical address space that is larger than a physical address space of the flash memory device, wherein writing data comprises issuing I/O requests to write data, each I/O request specifying a respective logical address space in said logical address space to which to write data; and

    periodically performing;

    making a determination that a particular realized physical usage of said flash memory device has reached a threshold, andin response to making said determination, issuing I/O requests to trim data at logical addresses within the logical address space;

    wherein periodically performing includes;

    making a first determination that a first realized physical usage of said flash memory device has reached said threshold, andin response to making said first determination, issuing I/O requests to trim data at logical addresses within the logical address space;

    making a second determination that a second realized physical usage of said flash memory device has reached said threshold, andin response to making said second determination, issuing I/O requests to trim data at logical addresses within the logical address space;

    wherein a first realized logical usage corresponds to the first realized physical usage of the first determination;

    wherein a second realized logical usage corresponds to the second realized physical usage of the second determination;

    wherein the first realized physical usage is equal to the second realized physical usage; and

    wherein the second realized logical usage is greater than the first realized logical usage.

View all claims
  • 1 Assignment
Timeline View
Assignment View
    ×
    ×