Self-powered anti-tamper sensors

• US 9,798,902 B2
• Filed: 10/25/2013
• Issued: 10/24/2017
• Est. Priority Date: 10/25/2012
• Status: Active Grant

• Current Assignee: Mide Technology Corporation (Totalenergies Se)
• Original Assignee: Mide Technology Corporation (Totalenergies Se)
• Inventors: Ludlow, Christopher, Hanly, Stephen, Motola-Barnes, Michael, Court, Jeffrey, Spadafora, Mark
• Primary Examiner(s): Fureman, Jared
• Assistant Examiner(s): BUKHARI, AQEEL H
• Application Number:
  US14/063,299
• Publication Number:
  US 20160164518A1
• Time in Patent Office: 1,460 Days
• Field of Search: None
• CPC Class Codes: G06F 21/86 Secure or tamper-resistant housings

Abstract

An anti-tampering system and method typically featuring a printed circuit board with anti-tamper protection circuitry powered by a power source. Switching circuitry is coupled between the power source and the anti-tamper protection circuitry. A transducer outputs a signal to the switching circuitry electrically connecting the power source to the anti-tamper protection circuitry in response to a tampering event. The switching circuitry otherwise disconnects the power source from the anti-tamper protection circuitry to save power.

Claims

1. An anti-tampering system comprising:

anti-tamper protection circuitry powered by a power source;

switching circuitry between the power source and the anti-tamper protection circuitry; and

a transducer outputting a signal to the switching circuitry electrically connecting the power source to the anti-tamper protection circuitry in response to a tampering event, whereas the switching circuitry otherwise disconnects the power source from the anti-tamper protection circuitry to save power.

2. The system of claim 1 in which the switching circuitry, power source, and anti-tamper protection circuitry are disposed on a printed circuit board.

3. The system of claim 2 in which the transducer includes a piezoelectric layer in a cover over the printed circuit board.

4. The system of claim 2 in which the printed circuit board further includes therein a piezoelectric layer.

5. The system of claim 2 further including spacer material between the printed circuit board and the cover.

6. The system of claim 2 in which the transducer is on the printed circuit board.

7. The system of claim 2 in which the printed circuit board includes one or more connectors.

8. The system of claim 7 in which said one or more connectors include a transducer connected to said switch.

9. The system of claim 8 in which piezoelectric material is disposed about a threaded fastener.

10. The system of claim 8 in which piezoelectric material is disposed in an injector.

11. The system of claim 9 in which the piezoelectric material is disposed in a socket type connector.

12. The system of claim 1 in which said transducer includes two layers of piezoelectric material connected out of phase.

13. An anti-tampering system comprising:

a printed circuit board including switching circuitry between a power source and anti-tampering protection circuitry, the switching circuitry normally decoupling the power source from the anti-tamper protection circuitry in the absence of a tampering event;

a cover over the printed circuit board including an integral transducer layer connected to the switching circuitry, the transducer layer configured to convert energy induced during a tampering event to an output signal to the switching circuitry in response to the tampering event thus electrically coupling the power source to the anti-tamper circuitry thereby providing power from the power source to the anti-tamper protection circuitry; and

a spacer layer between the cover and the printed circuit board.

14. The system of claim 13 in which the printed circuit board includes said anti-tamper protection circuitry.

15. The system of claim 13 in which the printed circuit board further includes an integral transducer layer connected to said switching circuitry.

16. An anti-tampering method comprising:

coupling switching circuitry between a power source and anti-tamper protection circuitry to electrically decouple the power source from the anti-tamper protection circuitry in the absence of a tampering event;

adding a transducer to an asset connected to the switching circuitry;

in response to a tampering event, the transducer outputting a signal to the switching circuitry causing the power source to provide power to the anti-tamper protection circuitry; and

protecting the asset via the anti-tamper protection circuitry.

17. The method of claim 16 in which the asset includes a printed circuit board.

18. The method of claim 17 in which the printed circuit board includes the switching circuitry and the anti-tamper protection circuitry.

19. The method of claim 17 further including a cover layer for the printed circuit board including the transducer.

20. The method of claim 16 in which the asset includes one or more connectors including a said transducer.

21. The method of claim 17 in which the transducer is on the printed circuit board.