Resistance change memory
First Claim
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1. A resistance change memory comprising:
- a memory cell comprising a resistance change element;
a reference voltage generating circuit which generates a reference adjustment voltage;
a first transistor which has a source and a drain, the drain providing a reference current in accordance with the reference adjustment voltage; and
a sense amplifier which compares a cell current flowing through the memory cell with the reference current flowing through the first transistor,wherein the reference voltage generating circuit comprises a negative feedback circuit, the negative feedback circuit including a second transistor having a gate coupled to a gate of the first transistor, and an operational amplifier which sets a drain of the second transistor to a predetermined voltage.
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Abstract
According to one embodiment, a resistance change memory includes a memory cell, a reference voltage generating circuit, a first transistor and a sense amplifier. The memory cell includes a resistance change element. The reference voltage generating circuit generates a reference adjustment voltage. The first transistor provides a reference current in accordance with the reference adjustment voltage. The sense amplifier compares a cell current flowing through the memory cell with the reference current flowing through the first transistor.
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Citations
16 Claims
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1. A resistance change memory comprising:
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a memory cell comprising a resistance change element; a reference voltage generating circuit which generates a reference adjustment voltage; a first transistor which has a source and a drain, the drain providing a reference current in accordance with the reference adjustment voltage; and a sense amplifier which compares a cell current flowing through the memory cell with the reference current flowing through the first transistor, wherein the reference voltage generating circuit comprises a negative feedback circuit, the negative feedback circuit including a second transistor having a gate coupled to a gate of the first transistor, and an operational amplifier which sets a drain of the second transistor to a predetermined voltage. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A resistance change memory comprising:
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a memory cell comprising a resistance change element; a reference voltage generating circuit which generates a reference adjustment voltage; a first transistor which has a source and a drain, the drain providing a reference current in accordance with the reference adjustment voltage; and a sense amplifier which compares a cell current flowing through the memory cell with the reference current flowing through the first transistor, wherein; the reference adjustment voltage changes in accordance with a temperature of the reference voltage generating circuit, the first transistor is an n-channel MOS transistor, and operates in a linear region which changes in resistance value in response to a change of the reference adjustment voltage, and the reference adjustment voltage is not applied to a circuit that is electrically connected between the memory cell and the sense amplifier. - View Dependent Claims (14, 15, 16)
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Specification