Semiconductor device and method of manufacturing a semiconductor device

• US 9,799,762 B2
• Filed: 12/03/2012
• Issued: 10/24/2017
• Est. Priority Date: 12/03/2012
• Status: Active Grant

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Meiser, Andreas, Schloesser, Till
• Primary Examiner(s): Lee, Cheung
• Assistant Examiner(s): Smith, Stephen C
• Application Number:
  US13/692,059
• Publication Number:
  US 20140151798A1
• Time in Patent Office: 1,786 Days
• CPC Class Codes: H01L 29/0856 Source regions
• CPC Class Codes: H01L 29/0873 Drain regions
• CPC Class Codes: H01L 29/1095 Body region, i.e. base region, of DMOS transistors or IGBTs cell layout H01L29/0696
• CPC Class Codes: H01L 29/404 Multiple field plate structures
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/41766 with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor H01L29/41733 - H01L29/41758 take precedence
• CPC Class Codes: H01L 29/66696 with a step of recessing the source electrode
• CPC Class Codes: H01L 29/66704 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7816 Lateral DMOS transistors, i.e. LDMOS transistors
• CPC Class Codes: H01L 29/7825 with trench gate electrode trench gate electrodes per se H01L29/4236

Abstract

A semiconductor device comprises a transistor formed in a semiconductor substrate having a first main surface. The transistor includes a source region, a drain region, a channel region, a drift zone, and a gate electrode being adjacent to the channel region. The gate electrode is configured to control a conductivity of a channel formed in the channel region, the channel region and the drift zone are disposed along a first direction between the source region and the drain region, the first direction being parallel to the first main surface. The channel region has a shape of a first ridge extending along the first direction, and the transistor includes a first field plate arranged adjacent to the drift zone.

Claims

1. A semiconductor device comprising a transistor formed in a semiconductor substrate having a first main surface, the transistor comprising:

a source region;

a drain region;

a channel region;

a drift zone;

a gate electrode adjacent to the channel region, the gate electrode configured to control a conductivity of a channel formed in the channel region, the gate electrode being disposed in gate trenches having a longitudinal axis extending in a first direction parallel to the first main surface, the channel region and the drift zone disposed along the first direction between the source region and the drain region, the channel region being patterned into a shape of a first ridge extending along the first direction by adjacent gate trenches,

the transistor further comprising a source contact in contact with the source region, the source contact extending along a vertical direction along the source region, and being disposed in a contact trench extending in the semiconductor substrate adjacent to the source region, a longitudinal axis of the contact trench running in a second horizontal direction perpendicular to the first direction.

2. The semiconductor device according to claim 1, wherein the gate electrode is disposed at at least two sides of the ridge.

3. The semiconductor device according to claim 1, further comprising a doped semiconductor region below the source region, wherein the source contact extends to the doped semiconductor region.

4. The semiconductor device according to claim 1, wherein a portion of the drift zone has a shape of a second ridge extending along the first direction.

5. The semiconductor device according to claim 4, further comprising a field plate adjacent to the drift zone, wherein portions of the field plate are disposed at at least two sides of the second ridge.

6. The semiconductor device according to claim 4, wherein the second ridge has a width different from a width of the first ridge.

7. The semiconductor device according to claim 1, further comprising a drain contact in contact with the drain region, the drain contact extending along a vertical direction along the drain region.

8. A semiconductor device comprising a transistor formed in a semiconductor substrate having a first main surface, the transistor comprising:

a source region;

a drain region;

a drain contact in contact with the drain region;

a channel region;

a drift zone;

a gate electrode adjacent to the channel region, the gate electrode configured to control a conductivity of a channel formed in the channel region, the gate electrode being disposed in gate trenches extending in a first direction parallel to the first main surface, the channel region and the drift zone disposed along the first direction between the source region and the drain region, the channel region being patterned into a shape of a first ridge extending along the first direction by adjacent gate trenches, and

a field plate adjacent to the drift zone, the field plate being arranged in field plate trenches, a longitudinal axis of the field plate trenches running in the first direction.

9. The semiconductor device according to claim 8, wherein the gate electrode is disposed at at least two sides of the ridge.

10. The semiconductor device according to claim 8, wherein the drain contact is disposed in a trench in the first main surface, adjacent to the drain region.

11. The semiconductor device according to claim 8, wherein a portion of the drift zone has a shape of a second ridge extending along the first direction, portions of the field plate being disposed at at least two sides of the second ridge.

13. The semiconductor device according to claim 11, further comprising a field plate adjacent to the drift zone, wherein portions of the first field plate are disposed at at least two sides of the second ridge.

14. The semiconductor device according to claim 11, wherein the second ridge has a width different from a width of the first ridge.

17. The semiconductor device according to claim 11, wherein the second ridge has a larger width than the width of the first ridge, the width being measured in a direction perpendicular to the first direction.

12. A semiconductor device comprising a transistor formed in a semiconductor substrate having a first main surface, the transistor comprising:

a source region;

a drain region;

a channel region;

a drift zone;

a gate electrode adjacent to the channel region, the gate electrode configured to control a conductivity of a channel formed in the channel region, the gate electrode being disposed in gate trenches extending in a first direction parallel to the first main surface, the channel region and the drift zone disposed along the first direction between the source region and the drain region, the channel region being patterned into a shape of a first ridge extending along the first direction by adjacent gate trenches,

the transistor further comprising a source contact trench in the semiconductor substrate, a longitudinal axis of the source contact trench running in a second horizontal direction perpendicular to the first direction, a conductive material in the source contact trench being electrically coupled to the source region.

15. The semiconductor device according to claim 12, wherein the source region is arranged in a sidewall of the contact trench.

16. The semiconductor device according to claim 12, wherein the gate electrode is disposed at at least two sides of the ridge.