Transistor and semiconductor device
First Claim
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1. A semiconductor device comprising:
- a gate electrode;
a gate insulating layer over the gate electrode, wherein the gate insulating layer includes a first region, a second region, and a third region between the first region and the second region;
an oxide semiconductor layer over the gate insulating layer;
a first electrode over the gate insulating layer, wherein a part of the first electrode is over and in contact with one end portion of the oxide semiconductor layer; and
a second electrode over the gate insulating layer, wherein a part of the second electrode is over and in contact with the other end portion of the oxide semiconductor layer,wherein in the first region, one end portion of the first electrode, the oxide semiconductor layer, and the gate electrode overlap each other,wherein in the second region, one end portion of the second electrode, the oxide semiconductor layer, and the gate electrode overlap each other, andwherein a thickness of the first region and a thickness of the second region are larger than a thickness of the third region.
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Abstract
A transistor which withstands a high voltage and controls large electric power can be provided. A transistor is provided which includes a gate electrode, a gate insulating layer over the gate electrode, an oxide semiconductor layer which is over the gate insulating layer and overlaps with the gate electrode, and a source electrode and a drain electrode which are in contact with the oxide semiconductor layer and whose end portions overlap with the gate electrode. The gate insulating layer includes a first region overlapping with the end portion of the drain electrode and a second region adjacent to the first region. The first region has smaller capacitance than the second region.
129 Citations
12 Claims
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1. A semiconductor device comprising:
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a gate electrode; a gate insulating layer over the gate electrode, wherein the gate insulating layer includes a first region, a second region, and a third region between the first region and the second region; an oxide semiconductor layer over the gate insulating layer; a first electrode over the gate insulating layer, wherein a part of the first electrode is over and in contact with one end portion of the oxide semiconductor layer; and a second electrode over the gate insulating layer, wherein a part of the second electrode is over and in contact with the other end portion of the oxide semiconductor layer, wherein in the first region, one end portion of the first electrode, the oxide semiconductor layer, and the gate electrode overlap each other, wherein in the second region, one end portion of the second electrode, the oxide semiconductor layer, and the gate electrode overlap each other, and wherein a thickness of the first region and a thickness of the second region are larger than a thickness of the third region. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A semiconductor device comprising:
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a gate electrode; a gate insulating layer over the gate electrode; an oxide semiconductor layer provided over the gate insulating layer and overlapping with the gate electrode; a first electrode in contact with the oxide semiconductor layer; and a second electrode provided in contact with the oxide semiconductor layer with a space between the first electrode and the second electrode, wherein the gate insulating layer includes; a first region; a second region overlapping with one end portion of the second electrode, the oxide semiconductor layer, and the gate electrode; a third region sandwiched between the first region and the second region and provided in contact with the first region with a space provided between the second region and the third region; a fourth region sandwiched between the third region and the second region and provided in contact with the second region with a space between the third region and the fourth region; and a fifth region sandwiched between the third region and the fourth region, wherein each of a capacitance of the first region, a capacitance of the second region, a capacitance of the third region, and a capacitance of the fourth region is smaller than a capacitance of the fifth region, and wherein in the first region, one end portion of the first electrode, the oxide semiconductor layer, and the gate electrode overlap each other. - View Dependent Claims (10, 11, 12)
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Specification