Method of manufacturing nitride semiconductor device using laminated cap layers

• US 9,805,930 B2
• Filed: 06/29/2016
• Issued: 10/31/2017
• Est. Priority Date: 08/25/2015
• Status: Active Grant

• Current Assignee: Fuji Electric Company Limited (Fuji Electric Systems Company Limited)
• Original Assignee: Fuji Electric Company Limited (Fuji Electric Systems Company Limited)
• Inventors: Tanaka, Ryo, Takashima, Shinya, Ueno, Katsunori, Edo, Masaharu
• Primary Examiner(s): HENRY, CALEB E
• Application Number:
  US15/196,035
• Publication Number:
  US 20170062220A1
• Time in Patent Office: 489 Days
• Field of Search: 438455
• CPC Class Codes: H01L 21/0254 Nitrides
• CPC Class Codes: H01L 21/02576 N-type
• CPC Class Codes: H01L 21/0262 Reduction or decomposition of gaseous compounds, e.g. CVD
• CPC Class Codes: H01L 21/02694 Controlling the interface between substrate and epitaxial layer, e.g. by ion implantation followed by annealing
• CPC Class Codes: H01L 21/187 by direct bonding
• CPC Class Codes: H01L 29/20 including, apart from doping materials or other impurities, only AIIIBV compounds
• CPC Class Codes: H01L 29/66204 Diodes
• CPC Class Codes: H01L 29/8611 Planar PN junction diodes

Abstract

A method of manufacturing a nitride semiconductor device is provided, comprising: forming, on a substrate, a first laminated body where a first nitride semiconductor layer, a second nitride semiconductor layer and a third nitride semiconductor layer are laminated in this order; subsequent to the forming, removing a partial region of the third nitride semiconductor layer, subsequent to the removing; implanting ions to the first nitride semiconductor layer from the partial region where the third nitride semiconductor layer is removed at least through the second nitride semiconductor layer; and subsequent to the implanting the ions, annealing the first laminated body.

Claims

1. A method of manufacturing a nitride semiconductor device, comprising:

forming, on a substrate, a first laminated body where a first nitride semiconductor layer, a second nitride semiconductor layer, and a third nitride semiconductor layer that is GaN are laminated in this order;

subsequent to the forming, removing a partial region of the third nitride semiconductor layer;

subsequent to the removing, implanting ions to the first nitride semiconductor layer from the partial region where the third nitride semiconductor layer is removed at least through the second nitride semiconductor layer; and

subsequent to the implanting the ions, annealing the first laminated body.

2. The method of manufacturing a nitride semiconductor device according to claim 1, wherein the first nitride semiconductor layer is Al_xGa₁₋

xN(0≦

x<

0.5), the second nitride semiconductor layer is Al_yGa_1-yN (0.5≦

y≦

1).

3. The method of manufacturing a nitride semiconductor device according to claim 1, wherein

the third nitride semiconductor layer has a thickness no less than twice that of the second nitride semiconductor layer, and

a thickness of the first nitride semiconductor layer is greater than the thickness of the third nitride semiconductor layer.

4. The method of manufacturing a nitride semiconductor device according to claim 1, wherein

the second nitride semiconductor layer has a thickness of no less than 3 nm and no greater than 100 nm.

5. The method of manufacturing a nitride semiconductor device according to claim 1, wherein

the forming comprises epitaxially forming the second nitride semiconductor layer on the first nitride semiconductor layer.

6. The method of manufacturing a nitride semiconductor device according to claim 1, wherein

the forming comprises continuously forming the first nitride semiconductor layer, the second nitride semiconductor layer and the third nitride semiconductor layer on the substrate by an epitaxial growth method.

7. The method of manufacturing a nitride semiconductor device according to claim 1, wherein

the removing comprises removing the partial region of the third nitride semiconductor layer until the second nitride semiconductor layer is exposed.

8. The method of manufacturing a nitride semiconductor device according to claim 1, further comprising:

prior to the annealing, forming the second nitride semiconductor layer and the third nitride semiconductor layer in this order under the substrate.

9. The method of manufacturing a nitride semiconductor device according to claim 1, wherein

the removing comprises:

removing the partial region of the third nitride semiconductor layer until the second nitride semiconductor layer is exposed, and

removing another region of the third nitride semiconductor layer without causing the second nitride semiconductor layer to be exposed.

10. The method of manufacturing a nitride semiconductor device according to claim 1, wherein

the forming comprises further forming, on the first laminated body, one or more of second laminated bodies where the second nitride semiconductor layer and the third nitride semiconductor layer are laminated in this order, and

the removing comprises removing the partial region of the third nitride semiconductor layer after the second laminated body on the partial region is all removed.

11. A method of manufacturing a nitride semiconductor device, comprising:

forming, on a substrate, a first laminated body where a first nitride semiconductor layer, a second nitride semiconductor layer, and a third nitride semiconductor layer are laminated in this order;

subsequent to the forming, removing a partial region of the third nitride semiconductor layer;

subsequent to the removing, implanting ions to the first nitride semiconductor layer from the partial region where the third nitride semiconductor layer is removed at least through the second nitride semiconductor layer;

subsequent to the implanting the ions, annealing the first laminated body; and

subsequent to the annealing, removing all of the second nitride semiconductor layer and the third nitride semiconductor layer which are in an active region.

12. The method according to claim 11, wherein

the removing all of the second nitride semiconductor layer and the third nitride semiconductor layer is not performed in a peripheral region.