Multilevel inverter device and method

• US 9,806,529 B2
• Filed: 07/28/2016
• Issued: 10/31/2017
• Est. Priority Date: 05/10/2012
• Status: Active Grant

• Current Assignee: Huawei Digital Power Technologies Company Limited (Huawei Investment & Holding Co., Ltd.)
• Original Assignee: Futurewei Technologies Incorporated (Huawei Investment & Holding Co., Ltd.)
• Inventors: Fu, Dianbo, He, Bo, Li, Quan
• Primary Examiner(s): Dole, Timothy J
• Assistant Examiner(s): Andino, Ivan Laboy
• Application Number:
  US15/222,170
• Publication Number:
  US 20170054298A1
• Time in Patent Office: 460 Days
• Field of Search: 363 16- 17, 363 34- 43, 363 84, 363 89, 363 95- 98, 363101, 363125, 363127, 363131-132, 363135-136
• CPC Class Codes: H02J 3/38 Arrangements for parallely feeding a single network by two or more generators, converters or transformers
• CPC Class Codes: H02M 1/007 Plural converter units in cascade push-pull DC/DC converters with pre-regulator H02M3/3374; DC-AC converters following a DC-DC stage including a high frequency transformer H02M7/4807; DC-AC converters following a DC-DC conversion stage generating periodically varying voltages H02M7/4826
• CPC Class Codes: H02M 3/156 with automatic control of output voltage or current, e.g. switching regulators
• CPC Class Codes: H02M 3/158 including plural semiconductor devices as final control devices for a single load
• CPC Class Codes: H02M 7/487 Neutral point clamped inverters
• CPC Class Codes: H02M 7/537 using semiconductor devices only, e.g. single switched pulse inverters
• CPC Class Codes: H02M 7/5387 in a bridge configuration
• CPC Class Codes: Y02E 10/56 Power conversion systems, e.g. maximum power point trackers

Abstract

An inverter comprises a first boost apparatus having an input coupled to a positive dc bus, a second boost apparatus having an input coupled to a negative dc bus, a first switch coupled to an input of an L-C filter and the first boost apparatus, a second switch coupled to the input of the L-C filter and the second boost apparatus, a third switch coupled between the positive dc bus and the first switch, wherein a common node of the first switch and the third switch is directly connected to an output of the first boost apparatus, a fourth switch coupled between the negative dc bus and the second switch, wherein a common node of the fourth switch and the second switch is directly connected to an output of the second boost apparatus and an isolation switch coupled between the input of the L-C filter and ground.

Claims

1. A method comprising:

providing an inverter comprising;

a first boost apparatus having an input coupled to a positive dc bus;

a second boost apparatus having an input coupled to a negative dc bus;

a first switch coupled to an input of an L-C filter and the first boost apparatus;

a second switch coupled to the input of the L-C filter and the second boost apparatus;

a third switch coupled between the positive dc bus and the first switch, wherein an output of the first boost apparatus is directly connected to a common node of the first switch and the third switch;

a fourth switch coupled between the negative dc bus and the second switch, wherein an output of the second boost apparatus is directly connected to a common node of the second switch and the fourth switch; and

an isolation switch coupled between the input of the L-C filter and ground;

during a first time period of a half switching cycle, switching a voltage at the input of the L-C filter back and forth between the positive dc bus and ground;

during a second time period of the half switching cycle, switching the voltage at the input of the L-C filter back and forth between an output voltage of the first boost apparatus and ground in at least two consecutive switching pulses; and

during a third time period of the half switching cycle, switching the voltage at the input of the L-C filter back and forth between the positive dc bus and ground, wherein the second time period is between the first time period and the third time period.

2. The method of claim 1, wherein:

during a transition time instant from the first time period to the second time period, the voltage at the input of the L-C filter increases from the positive dc bus to the output voltage of the first boost apparatus.

3. The method of claim 1, further comprising:

during a transition time instant from the second time period to the third time period, the voltage at the input of the L-C filter decreases from the output voltage of the first boost apparatus to the positive dc bus.

4. The method of claim 1, further comprising:

turning off the first boost apparatus when the inverter switches back and forth between ground and the positive dc bus; and

turning off the second boost apparatus when the inverter switches back and forth between ground and the negative dc bus.

5. The method of claim 1, further comprising:

during a mode transition from a boost mode to an input de source mode, keeping the third switch off until a voltage across two terminals of an output capacitor of the first boost apparatus is discharged to a level approximately equal to the positive dc bus.

6. The method of claim 1, further comprising:

during a mode transition from a boost mode to an input de source mode, keeping the fourth switch off until a voltage across two terminals of an output capacitor of the second boost apparatus is discharged to a level approximately equal to the negative dc bus.

7. The method of claim 1, wherein:

the isolation switch functions as a freewheeling path between the input of the L-C filter and ground.