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Semiconductor structure with multiple transistors having various threshold voltages

  • US 9,812,550 B2
  • Filed: 01/30/2017
  • Issued: 11/07/2017
  • Est. Priority Date: 06/27/2012
  • Status: Active Grant
First Claim
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1. A method of fabricating a semiconductor structure, comprising:

  • implanting in a substrate a first antipunchthrough region with a first doping concentration;

    implanting in the substrate a second antipunchthrough region with a second doping concentration;

    implanting in the substrate a screening region with a third doping concentration;

    forming a substantially undoped channel on the substrate;

    forming a gate on the substrate;

    implanting in the substrate a source and a drain;

    wherein the screening region is located to be below a surface of the substrate at a distance of at least less than 1.5 times a length of the gate and above a bottom of the source and drain to which the screening region abuts;

    wherein the first antipunchthrough region underlies the screening region and the first doping concentration is less than the third doping concentration;

    wherein the second antipunchthrough region underlies the first antipunchthrough region and the second doping concentration is less than the third doping concentration.

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