Deep trench active device with backside body contact

• US 9,812,580 B1
• Filed: 09/06/2016
• Issued: 11/07/2017
• Est. Priority Date: 09/06/2016
• Status: Active Grant

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Qualcomm, Inc.
• Inventors: Goktepeli, Sinan, Fanelli, Steve
• Primary Examiner(s): Gordon, Matthew
• Application Number:
  US15/257,823
• Time in Patent Office: 427 Days
• CPC Class Codes: H01L 21/76251 using bonding techniques
• CPC Class Codes: H01L 2223/6616 Vertical connections, e.g. vias
• CPC Class Codes: H01L 2223/6677 for antenna, e.g. antenna included within housing of semiconductor device antennas per se H01Q
• CPC Class Codes: H01L 23/481 Internal lead connections, e.g. via connections, feedthrough structures
• CPC Class Codes: H01L 23/5223 Capacitor integral with wiring layers
• CPC Class Codes: H01L 23/66 High-frequency adaptations
• CPC Class Codes: H01L 27/1211 combined with field-effect transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 29/0649 Dielectric regions, e.g. SiO2 regions, air gaps
• CPC Class Codes: H01L 29/66795 with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 29/7851 with the body tied to the substrate
• CPC Class Codes: H01L 29/78615 with a body contact
• CPC Class Codes: H01Q 1/241 used in mobile communications, e.g. GSM H01Q1/247, H01Q1/248 take precedence
• CPC Class Codes: H01Q 1/38 formed by a conductive layer on an insulating support patch antennas H01Q9/0407; microstrip dipole antennas H01Q9/065; microstrip slot antennas H01Q13/106; transmission line microstrip antennas H01Q13/206; manufacturing reflecting surfaces using insulating material for supporting the reflecting surface H01Q15/142

Abstract

An integrated circuit may include a gate, having gate fingers. The integrated circuit may also include a body, having semiconductor pillars interlocking with the gate fingers of the gate. The integrated circuit may also include a backside contact(s) coupled to the body. The integrated circuit may further include a backside metallization. The backside metallization may be coupled to the body through the backside contact(s).

Claims

1. An integrated circuit, comprising:

a gate including a plurality of gate fingers;

a body including a plurality of semiconductor pillars interlocking with the plurality of gate fingers;

at least one backside contact coupled to the body; and

a backside metallization coupled to the body through the at least one backside contact.

2. The integrated circuit of claim 1, in which the plurality of gate fingers comprise a polysilicon material.

3. The integrated circuit of claim 1, further comprising a gate dielectric between the plurality of gate fingers and the plurality of semiconductor pillars.

4. The integrated circuit of claim 3, further comprising a capacitor including the plurality of gate fingers as a first plate, the plurality of semiconductor pillars as a second plate, and the gate dielectric as a capacitor dielectric.

5. The integrated circuit of claim 1, in which the backside contact comprises a plurality of contact plugs, each coupled between the body and the backside metallization, the backside metallization directly coupled to the plurality of contact plugs.

6. The integrated circuit of claim 1, further comprising a backside silicide directly between the backside contact and the body.

7. The integrated circuit of claim 6, in which the backside silicide comprises a plurality of discrete elements, directly on the body, or the backside silicide comprises a continuous layer on the body.

8. The integrated circuit of claim 1, further comprising:

a first doped region of the body proximate a first side of the gate; and

a second doped region of the body proximate a second side opposite the first side of the gate.

9. The integrated circuit of claim 8, in which the first doped region is a source region and the second doped region is a drain region.

10. The integrated circuit of claim 1, further comprising:

a buried oxide (BOX) layer; and

a backside dielectric layer supporting the buried oxide layer, in which the body extends through the buried oxide layer and is supported by the backside dielectric layer, and the backside contact and the backside metallization are in the backside dielectric layer.

11. The integrated circuit of claim 1, further comprising:

a buried oxide (BOX) layer; and

a backside dielectric layer supporting the buried oxide layer, in which the body extends into the buried oxide layer, and the backside contact extends into the buried oxide layer to couple to the body and the backside metallization.

12. The integrated circuit of claim 1, further comprising:

a buried oxide layer through which a first portion of the gate extends, the first portion coupling to the plurality of gate fingers; and

a backside dielectric layer supporting the buried oxide layer.

13. The integrated circuit of claim 1, integrated into a radio frequency (RF) front end module, the RF front end module incorporated into at least one of a music player, a video player, an entertainment unit, a navigation device, a communications device, a personal digital assistant (PDA), a fixed location data unit, a mobile phone, and a portable computer.

14. A method of constructing an integrated circuit, comprising:

etching a semiconductor layer within an isolation layer to form a body including a plurality of semiconductor pillars;

depositing a dielectric material layer on a front-side surface of the isolation layer and on a surface of the plurality of semiconductor pillars;

depositing a semiconductor material on the dielectric material layer and in a plurality of trenches separating the plurality of semiconductor pillars to form a gate including a plurality of gate fingers, the plurality of gate fingers interlocking with the plurality of semiconductor pillars;

bonding a handle substrate to a front-side dielectric layer on the front-side surface of the isolation layer; and

fabricating a backside metallization in a backside dielectric layer supporting a backside surface of the isolation layer, the backside metallization coupled to the body through at least one backside contact.

15. The method of claim 14, in which depositing the semiconductor material comprises depositing a polysilicon material on the dielectric material layer and in the plurality of trenches separating the plurality of semiconductor pillars to form the gate including the plurality of gate fingers.

16. The method of claim 14, further comprising depositing a backside silicide directly between the backside contact and the body.

17. The method of claim 16, further comprising depositing the backside silicide as a plurality of discrete elements, directly on the body, or as a continuous layer on the body.

18. The method of claim 14, further comprising:

doping a first doped region of the body proximate a first side of the gate; and

doping a second doped region of the body proximate a second side opposite the first side of the gate.

19. The method of claim 14, in which depositing the semiconductor material further comprises depositing a first portion of the gate that extends through a buried oxide layer, the first portion of the gate coupling to the plurality of gate fingers.

20. The method of claim 14, further comprising integrating the integrated circuit into a radio frequency (RF) front end module, the RF front end module incorporated into at least one of a music player, a video player, an entertainment unit, a navigation device, a communications device, a personal digital assistant (PDA), a fixed location data unit, a mobile phone, and a portable computer.

21. An integrated circuit, comprising:

a gate including a plurality of gate fingers;

a body including a plurality of semiconductor pillars interlocking with the plurality of gate fingers;

at least one backside contact coupled to the body; and

means for tying the body through the at least one backside contact.

22. The integrated circuit of claim 21, further comprising:

a first doped region of the body proximate a first side of the gate; and

a second doped region of the body proximate a second side opposite the first side of the gate.

23. The integrated circuit of claim 21, integrated into a radio frequency (RF) front end module, the RF front end module incorporated into at least one of a music player, a video player, an entertainment unit, a navigation device, a communications device, a personal digital assistant (PDA), a fixed location data unit, a mobile phone, and a portable computer.

24. A radio frequency (RF) front end module, comprising:

an integrated RF circuit, comprising a deep trench switch transistor including a gate including a plurality of gate fingers and a body including a plurality of semiconductor pillars interlocking with the plurality of gate fingers, at least one backside contact coupled to the body, and a backside metallization coupled to the body through the at least one backside contact; and

an antenna coupled to an output of the switch transistor.

25. The RF front end module of claim 24, incorporated into at least one of a music player, a video player, an entertainment unit, a navigation device, a communications device, a personal digital assistant (PDA), a fixed location data unit, a mobile phone, and a portable computer.