×

Synchronous rectifier circuit

  • US 9,812,983 B2
  • Filed: 05/13/2016
  • Issued: 11/07/2017
  • Est. Priority Date: 05/18/2015
  • Status: Active Grant
First Claim
Patent Images

1. A control circuit structured to form a synchronous rectifier circuit together with a bridge circuit, wherein the bridge circuit comprises:

  • a first transistor arranged between a first input node and a rectification node;

    a second transistor arranged between a second input node and the rectification node;

    a third transistor arranged between the first input node and a reference node; and

    a fourth transistor arranged between the second input node and the reference node,and wherein the control circuit comprises;

    a first variable voltage source structured to generate a first threshold voltage which is variable;

    a first zero current detection comparator structured to compare a first voltage at the first input node with the first threshold voltage, and to generate a first detection signal having a first level when the first voltage is higher than the first threshold voltage, and having a second level when the first voltage is lower than the first threshold voltage;

    a first adjustment comparator structured to compare the first voltage with a first reference voltage;

    a first adjustment unit structured to adjust the first threshold voltage generated by the first variable voltage source, based on an output of the first adjustment comparator; and

    a control logic structured to switch a state of the bridge circuit according to the first detection signal,and wherein the first adjustment unit comprises an up/down counter structured to select one from among a count up operation and a count down operation, according to an output of the first adjustment comparator,and wherein the first adjustment voltage is set according to a count value of the up/down counter,and wherein the first threshold voltage is variable in the vicinity of zero,wherein the first reference voltage is configured as a negative voltage,wherein the control logic is structured to instruct the bridge circuit to transit from a first state to a second state when the first detection signal becomes the first level,wherein a pair of the first transistor and the fourth transistor are turned off and a pair of the second transistor and the third transistor are turned on in the first state, and the first transistor through the fourth transistor are turned off in second state.

View all claims
  • 1 Assignment
Timeline View
Assignment View
    ×
    ×