Apparatus for high voltage tolerant driver
First Claim
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1. An apparatus comprising:
- a first power supply;
a second power supply lower than the first power supply;
first and second transistors coupled in series and coupled to a bias signal and a pad;
a first pull-up transistor coupled to the first power supply and to the first transistor;
a pull-down transistor coupled to the second transistor; and
a second pull-up transistor coupled to the second power supply, the pull-down transistor, and to the second transistor, wherein the first pull-up transistor, the first and second transistors and the pull-down transistor form a first driver to operate in a first mode of operation, and the second pull-up transistor, the pull-down transistor and the second transistor form a second driver to operate in a second mode of operation.
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Abstract
Described is an apparatus which comprises: a first power supply; a second power supply lower than the first power supply; first and second transistors coupled in series and to be biased, the first and second transistors coupled to a pad; a first pull-up transistor coupled to the first power supply and to one of the first or second transistors; a pull-down transistor coupled to one of the first or second transistors; and a second pull-up transistor coupled to the second power supply, the pull-down transistor, and to one of the first or second transistors.
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Citations
20 Claims
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1. An apparatus comprising:
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a first power supply; a second power supply lower than the first power supply; first and second transistors coupled in series and coupled to a bias signal and a pad; a first pull-up transistor coupled to the first power supply and to the first transistor; a pull-down transistor coupled to the second transistor; and a second pull-up transistor coupled to the second power supply, the pull-down transistor, and to the second transistor, wherein the first pull-up transistor, the first and second transistors and the pull-down transistor form a first driver to operate in a first mode of operation, and the second pull-up transistor, the pull-down transistor and the second transistor form a second driver to operate in a second mode of operation. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 14, 15, 16)
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9. A driver comprising:
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a first pull-up transistor coupled to a first power supply, the first pull-up transistor controllable by a first pre-driver; a second pull-up transistor coupled to a second power supply, the second pull-up transistor controllable by a second pre-driver; first and second transistors coupled in series and coupled to a first bias signal and a first pad, the first and second transistors separating the first pull-up transistor from the second pull-up transistor, the first transistor coupled to the first pull-up transistor and the second transistor coupled to the second pull-up transistor; and a first pull-down transistor coupled to the second pull-up transistor, wherein the first pull-up transistor, the first and second transistors and the pull-down transistor form a first driver to operate in a first mode of operation, and the second pull-up transistor, the pull-down transistor and the second transistor form a second driver to operate in a second mode of operation. - View Dependent Claims (10, 11, 12, 13, 17, 18)
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19. A driver comprising:
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a first pull-up transistor coupled to a first power supply, the first pull-up transistor controllable by a first pre-driver; a second pull-up transistor coupled to a second power supply, the second pull-up transistor controllable by a second pre-driver; first and second transistors coupled in series between the first pull-up transistor and the second pull-up transistor and coupled to a first bias signal and a first pad; a first pull-down transistor coupled to the second pull-up transistor; a third pull-up transistor coupled to the first power supply, the third pull-up transistor controllable by a third pre-driver; a fourth pull-up transistor coupled to the second power supply, the fourth pull-up transistor controllable by a fourth pre-driver; third and fourth transistors coupled in series between the third pull-up transistor and the fourth pull-up transistor and coupled to a second bias signal and a second pad; and a second pull-down transistor coupled to the second pull-up transistor. - View Dependent Claims (20)
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Specification