Techniques for entering a low-power link state

• US 9,813,998 B2
• Filed: 03/07/2011
• Issued: 11/07/2017
• Est. Priority Date: 06/29/2006
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Conrad, Shaun M., Safranek, Robert J., Bilgin, Selim
• Primary Examiner(s): Decady, Albert
• Assistant Examiner(s): ALSHACK, OSMAN M
• Application Number:
  US13/042,104
• Publication Number:
  US 20110161702A1
• Time in Patent Office: 2,437 Days
• Field of Search: 714748, 714750, 714746
• CPC Class Codes: H04L 1/0045 Arrangements at the receiver end
• CPC Class Codes: H04L 1/0057 Block codes H04L1/0061, H04L1/0064 take precedence
• CPC Class Codes: H04L 1/0061 Error detection codes
• CPC Class Codes: H04W 52/28 using user profile, e.g. mobile speed, priority or network state, e.g. standby, idle or non transmission
• CPC Class Codes: H04W 52/287 when the channel is in stand-by
• CPC Class Codes: H04W 52/48 during retransmission after error or non-acknowledgment

Abstract

Techniques to cause a point-to-point link between system components to engage in a negotiation process that may lead to the link transitioning from an active state in which data may be transmitted between system components to a low power state where data may not be transmitted. The negotiation process may occur between each pair of nodes within an electronic system that are interconnected via point-to-point link. The negotiation may ensure that there are no pending transactions or transactions that may occur within an upcoming period of time. Through this negotiation each component acknowledges and agrees to transition the link to the low power state.

Claims

1. An apparatus comprising:

a physical point-to-point link within an electronic system having a cache-coherent, link-based interconnect fabric;

a first component within the electronic system coupled with a first end of the point-to-point link, the first component to transmit a request over the point-to-point link to initiate transition of the point-to-point link from an active state to a low power state, the first component to operate as a master device in a power control negotiation, wherein the point-to-point link is to be incapable of transmitting packets during the low power state; and

a second component within the electronic system coupled with a second end of the point-to-point link, the second component, in response to the request, to selectively allow or disallow the transition of the point-to-point link from the active state to the low power state, wherein the second component sends negative acknowledge (NACK) message to disallow the transition of the point-to-point link from the active state to the low power state, and further wherein the first component maintains the point-to-point link in the active state in response to the NACK message, the second component to operate as a slave device in the power control negotiation, wherein no pending transactions or subsequent transactions are to occur within an upcoming period of time.

2. The apparatus of claim 1 wherein the second component sends an acknowledge message to allow the transition of the point-to-point link from the active state to the low power state, and further wherein the first component causes the point-to-point link to enter the low power state in response to the acknowledge message.

3. The apparatus of claim 1 wherein the first component does not reissue the request message for at least a predetermined period of time after receiving the NACK message from the second component.

4. The apparatus of claim 1 further comprising:

a second physical point-to-point link within the cache-coherent, link-based interconnect fabric of the electronic system;

the first component within the electronic system coupled with a first end of the second point-to-point link, the first component to transmit a second request over the second point-to-point link to initiate transition of the second point-to-point link from an active state to a low power state; and

a third component within the electronic system coupled with a second end of the second point-to-point link, the third component, in response to the second request, to selectively allow or disallow the transition of the second point-to-point link from the active state the low power state.

5. The apparatus of claim 1 further comprising:

a second physical point-to-point link within the cache-coherent, link-based interconnect fabric of the electronic system;

a third component within the electronic system coupled with a first end of the second point-to-point link, the third component to transmit a second request over the second point-to-point link to initiate transition of the second point-to-point link from an active state to a low power state; and

the first component within the electronic system coupled with a second end of the second point-to-point link, the first component, in response to the request, to selectively allow or disallow the transition of the second point-to-point link from the active state the low power state, wherein the first component is to operate as a slave device in power control negotiation for the second point-to-point link.

6. A system comprising:

a physical point-to-point link within an electronic system having a cache-coherent, link-based interconnect fabric;

a first component within the electronic system coupled with a first end of the point-to-point link, the first component to transmit a request over the point-to-point link to initiate transition of the point-to-point link from an active state to a low power state, the first component to operate as a master device in a power control negotiation, wherein the link is to be incapable of transmitting packets during the low power state;

a second component within the electronic system coupled with a second end of the point-to-point link, the second component, in response to the request, to selectively allow or disallow the transition of the point-to-point link from the active state to the low power state, wherein the second component sends negative acknowledge (NACK) message to disallow the transition of the point-to-point link from the active state to the low power state, and further wherein the first component maintains the point-to-point link in the active state in response to the NACK message, the second component to operate as a slave device in the power control negotiation, wherein no pending transactions or subsequent transactions are to occur within an upcoming period of time; and

a dynamic random access memory coupled with the second component.

7. The system of claim 6 wherein the second component sends an acknowledge message to allow the transition of the point-to-point link from the active state to the low power state, and further wherein the first component causes the point-to-point link to enter the low power state in response to the acknowledge message.

8. The system of claim 6 wherein the first component does not reissue the request message for at least a predetermined period of time after receiving the NACK message from the second component.

9. The system of claim 6 further comprising:

a second physical point-to-point link within the cache-coherent, link-based interconnect fabric of the electronic system;

the first component within the electronic system coupled with a first end of the second point-to-point link, the first component to transmit a second request over the second point-to-point link to initiate transition of the second point-to-point link from an active state to a low power state; and

a third component within the electronic system coupled with a second end of the second point-to-point link, the third component, in response to the second request, to selectively allow or disallow the transition of the second point-to-point link from the active state the low power state.

10. The system of claim 6 further comprising:

a second physical point-to-point link within the cache-coherent, link-based interconnect fabric of the electronic system;

a third component within the electronic system coupled with a first end of the second point-to-point link, the third component to transmit a second request over the second point-to-point link to initiate transition of the second point-to-point link from an active state to a low power state; and

the first component within the electronic system coupled with a second end of the second point-to-point link, the first component, in response to the request, to selectively allow or disallow the transition of the second point-to-point link from the active state the low power state, wherein the first component is to operate as a slave device in power control negotiation for the second point-to-point link.

11. A method comprising:

transmitting a request message from a master component of an electronic system to a slave component of the electronic system having a cache-coherent, link-based interconnect fabric over a physical point-to-point link, the request to initiate transition of the point-to-point link from an active state to a low power state;

receiving a response message from the slave component with the master component, the response message being either an acknowledge (ACK) message to allow transition from the active state to the low power state or a negative acknowledge (NACK) message to disallow transition from the active state to the low power state, the master component and the slave component to negotiate power level changes, where the negotiation is to ensure that no pending transactions or subsequent transactions occur within an upcoming period of time; and

causing the point-to-point link to transition to the low power state in response to receiving the ACK message from the slave device, wherein no packets are to be transmitted over the point-to-point link during the low power state.

12. The method of claim 11 further comprising:

determining, with the master component, whether the master component will transmit data over the point-to-point link during an upcoming period of time; and

causing the request message from the master device to the slave device if the master component is not to transmit data during the upcoming period of time.

13. The method of claim 11 wherein causing the point-to-point link to transition to the low power state in response to receiving the ACK message from the slave device in response to receiving the ACK message comprises causing a clock signal and/or a supply voltage for the point-to-point link to be disabled.

14. The method of claim 11 further comprising preventing reissue of the request message for a predetermined period of time after receiving the NACK message.

15. The method of claim 14 further comprising reissuing the request message before the predetermined period of time if a transmission error occurs.

16. A method comprising:

receiving, with a slave component within an electronic system, a request message from a master component within the electronic system having a cache-coherent, link-based interconnect fabric over a point-to-point link, the request to initiate transition of the point-to-point link from an active state to a low power state, wherein no packets are to be transmitted over the point-to-point link during the low power state;

determining whether to respond to the request message with an acknowledge (ACK) message to allow transition from the active state to the low power state or to respond to the request with a negative acknowledge (NACK) message to disallow transition from the active state to the low power state, the master component and the slave component to negotiate power level changes, where the negotiation is to ensure that no pending transactions or subsequent transactions occur within an upcoming period of time; and

transmitting either the ACK message or the NACK message to the master component over the point-to-point link.

17. The method of claim 16 further comprising sending, from the slave component, a request message corresponding to each additional point-to-point link, if any, for which the slave component is a master.

18. The method of claim 16 further comprising:

determining, with the slave component, whether the slave component will transmit data over the point-to-point link during an upcoming period of time; and

causing the ACK message to be transmitted from the slave device to the master device if the slave component is not to transmit data during the upcoming period of time.

19. The method of claim 16 further comprising:

determining, with the slave component, whether the slave component will transmit data over the point-to-point link during an upcoming period of time; and

causing the NACK message to be transmitted from the slave device to the master device if the slave component is to transmit data during the upcoming period of time.

20. The method of claim 16 further comprising:

evaluating one or more operational parameters of the slave component; and

causing either a NACK message or an ACK message to be transmitted to the master device based on the evaluation of the operational parameters of the slave components.