Processor power management responsive to a sequence of an instruction stream

• US 9,817,470 B2
• Filed: 02/24/2016
• Issued: 11/14/2017
• Est. Priority Date: 02/25/2015
• Status: Active Grant

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Qualcomm, Inc.
• Inventors: Sugumar, Suresh, Gemar, Jeffrey, Taha, Ali, Derbyshire, Amy, Xue, Tao, Tamjidi, Mohammad, Mittal, Rajat
• Primary Examiner(s): Wang, Albert
• Application Number:
  US15/052,786
• Publication Number:
  US 20160246362A1
• Time in Patent Office: 629 Days
• CPC Class Codes: G06F 1/3206 Monitoring of events, devices or parameters that trigger a change in power modality
• CPC Class Codes: G06F 1/3243 Power saving in microcontroller unit
• CPC Class Codes: G06F 1/3287 by switching off individual functional units in the computer system
• CPC Class Codes: G06F 1/3296 by lowering the supply or operating voltage
• CPC Class Codes: G06F 9/30189 according to execution mode, e.g. mode flag
• CPC Class Codes: G06F 9/3836 Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
• CPC Class Codes: G06F 9/3861 Recovery, e.g. branch miss-prediction, exception handling error detection or correction G06F11/00
• CPC Class Codes: G06F 9/3885 using a plurality of independent parallel functional units
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

An apparatus includes a first circuit and a second circuit sharing an instruction stream. A voltage controller circuit is configured to provide an operation voltage and at least one low-power voltage to the second circuit independent of a supply voltage of the first circuit in response to a sequence of the instruction stream. In another aspect, a method of operating a power management function is presented. The method includes providing an instruction stream for a first circuit and a second circuit and providing selectively an operation voltage and at least one low-power voltage to the second circuit independent of a supply voltage of the first circuit in response to a sequence of the instruction stream.

Claims

1. An apparatus, comprising:

a first circuit;

a second circuit, wherein the first circuit and the second circuit share an instruction stream; and

a voltage controller circuit configured to provide an operation voltage and at least one low-power voltage to the second circuit independent of a supply voltage of the first circuit in response to a sequence of the instruction stream and a performance mode, wherein one of the at least one low-power voltage comprises a power off mode and the voltage controller circuit is further configured to stall an instruction pipeline of the first circuit, exit the power off mode, and unstall the instruction pipeline based on the performance mode.

2. The apparatus of claim 1, wherein the first circuit comprises an integer unit of a processor, and the second circuit comprise a non-integer unit of the processor.

3. The apparatus of claim 1, wherein the at least one low-power voltage comprises a retention voltage.

4. The apparatus of claim 1, wherein the at least one low-power voltage further comprises a power-off voltage.

5. The apparatus of claim 1, wherein the voltage controller circuit is configured to switch from providing the operation voltage to providing the at least one low-power voltage in response to the sequence of the instruction stream.

6. The apparatus of claim 5, wherein the at least one low-power voltage comprises a plurality of voltages, and the voltage controller circuit is configured to switch among the plurality of voltages in response to a hysteresis or a threshold in a subsequent sequence of the instruction stream.

7. The apparatus of claim 1, wherein the voltage controller circuit is configured to switch from providing the at least one low-power voltage to providing the operation voltage in response to a signaling of the instruction stream.

8. The apparatus of claim 7, wherein the signaling of the instruction stream comprises an instruction associated with the second circuit.

9. The apparatus of claim 1, wherein the first circuit is configured to emulate an operation of the second circuit in response to a signaling of the instruction stream for using the second circuit.

10. The apparatus of claim 1, wherein the voltage controller circuit is configured to not switch from providing the at least one low-power voltage to providing the operation voltage in response to a signaling of the instruction stream for using the second circuit.

11. The apparatus of claim 1, wherein the at least one low-power voltage comprises a first voltage and a second voltage, and wherein the voltage controller circuit is configured to switch from providing the at least one low-power voltage to providing the operation voltage, in response to a signaling of the instruction stream for using the second circuit and the at least one low-power voltage being the first voltage.

12. The apparatus of claim 11, wherein the voltage controller circuit is configured to not switch from providing the at least one low-power voltage to providing the operation voltage, in response to the signaling of the instruction stream for using the second circuit and the at least one low-power voltage being the second voltage.

13. The apparatus of claim 12, wherein the first circuit is configured to emulate an operation of the second circuit in response to the signaling of the instruction stream for using the second circuit.

14. A method of operating a power management function, comprising:

providing an instruction stream for a first circuit and a second circuit; and

providing selectively an operation voltage and at least one low-power voltage to the second circuit independent of a supply voltage of the first circuit in response to a sequence of the instruction stream, wherein providing selectively the operation voltage and the at least one low-power voltage includes stalling an instruction pipeline of the first circuit, exiting a power off mode, and unstalling the instruction pipeline based on a performance mode, one of the at least one low-power voltage comprises the power off mode.

15. The method of claim 14, wherein the first circuit comprises an integer unit of a processor, and the second circuit comprise a non-integer unit of the processor.

16. The method of claim 14, wherein the at least one low-power voltage comprises a retention voltage.

17. The method of claim 14, wherein the at least one low-power voltage further comprises a power-off voltage.

18. The method of claim 14, wherein the providing selectively the operation voltage and the at least one low-power voltage to the second circuit comprises switching from providing the operation voltage to providing the at least one low-power voltage in response to the sequence of the instruction stream.

19. The method of claim 18, wherein the at least one low-power voltage comprises a plurality of voltages, further comprising switching among the plurality of voltages in response to a hysteresis or a threshold in a subsequent sequence of the instruction stream.

20. The method of claim 14, further comprising switching from providing the at least one low-power voltage to providing the operation voltage in response to a signaling of the instruction stream.

21. The method of claim 20, wherein the signaling of the instruction stream includes an instruction associated with the second circuit.

22. The method of claim 14, emulating by the first circuit an operation of the second circuit in response to a signaling of the instruction stream for using the second circuit.

23. The method of claim 14, further comprising not switching from providing the at least one low-power voltage to providing the operation voltage, in response to a signaling of the instruction stream for using the second circuit.

24. The method of claim 14, wherein the at least one low-power voltage comprises a first voltage and a second voltage, further comprising switching from providing the at least one low-power voltage to providing the operation voltage, in response to a signaling of the instruction stream for using the second circuit and the at least one low-power voltage being the first voltage.

25. The method of claim 24, further comprising not switching from providing the at least one low-power voltage to providing the operation voltage, in response to the signaling of the instruction stream for using the second circuit and the at least one low-power voltage being the second voltage.

26. The method of claim 25, further comprising emulating by the first circuit an operation of the second circuit in response to the signaling of the instruction stream for using the second circuit.

27. An apparatus, comprising:

a first circuit;

a second circuit, wherein the first circuit and the second circuit share an instruction stream; and

means for generating voltage control signals that provide selectively an operation voltage and at least one low-power voltage to the second circuit independent of a supply voltage of the first circuit in response to a sequence of the instruction stream and a performance mode, wherein one of the at least one low-power voltage comprises a power off mode and the means for generating voltage control signals is further configured to stall an instruction pipeline of the first circuit, exit the power off mode, and unstall the instruction pipeline based on a performance mode.