Programmable resistive device and memory using diode as selector
First Claim
1. A Programmable Resistive Device (PRD) memory, comprising:
- a plurality of PRD cells, at least one of the cells comprising;
at least one PRD including at least a diode and a Programmable Resistive Element (PRE) formed in a contact hole at a crossover of first conductor lines and second conductor lines located in two or more vertical layers;
the PRE coupled to the respective first conductor line; and
the diode including at least a first active region and a second active region isolated from the first active region, where the first active region having a first type of dopant and a second active region having a second type of dopant, the first active region providing a first terminal of the diode, the second active region providing a second terminal of the diode, the first active region coupled to the PRE and the second active region coupled to the respective second conductor line,wherein the PRE of the at least one PRD is coupled to another PRD or shared between two PRDs whose diode is coupled to the respective second conductor line or the respective third conductor line, such coupling is facilitated by an extension that extends vertically through the second conductor line penetrating into the second conductor to couple to the PRE or the diode of the another PRD, andwherein the PRE is configured to be programmable by applying voltages to the first conductor line, the second conductor line and/or the third conductor line to thereby change its resistance for a different logic state.
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Accused Products
Abstract
Building programmable resistive devices in contact holes at the crossover of a plurality of conductor lines in more than two vertical layers is disclosed. There are plurality of first conductor lines and another plurality of second conductor lines that can be substantially perpendicular to each other, though in two different vertical layers. A diode and/or a programmable resistive element can be fabricated in the contact hole between the first and second conductor lines. The programmable resistive element can be coupled to another programmable resistive device or shared between two programmable devices whose diodes conducting currents in opposite directions and/or coupled to a common conductor line. The programmable resistive memory can be configured to be programmable by applying voltages to conduct current flowing through the programmable resistive element to change its resistance for a different logic state.
505 Citations
28 Claims
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1. A Programmable Resistive Device (PRD) memory, comprising:
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a plurality of PRD cells, at least one of the cells comprising; at least one PRD including at least a diode and a Programmable Resistive Element (PRE) formed in a contact hole at a crossover of first conductor lines and second conductor lines located in two or more vertical layers; the PRE coupled to the respective first conductor line; and the diode including at least a first active region and a second active region isolated from the first active region, where the first active region having a first type of dopant and a second active region having a second type of dopant, the first active region providing a first terminal of the diode, the second active region providing a second terminal of the diode, the first active region coupled to the PRE and the second active region coupled to the respective second conductor line, wherein the PRE of the at least one PRD is coupled to another PRD or shared between two PRDs whose diode is coupled to the respective second conductor line or the respective third conductor line, such coupling is facilitated by an extension that extends vertically through the second conductor line penetrating into the second conductor to couple to the PRE or the diode of the another PRD, and wherein the PRE is configured to be programmable by applying voltages to the first conductor line, the second conductor line and/or the third conductor line to thereby change its resistance for a different logic state. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. An electronic system, comprising:
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a processor; and a programmable resistive memory operatively connected to the processor, the programmable resistive memory including a plurality of programmable resistive devices, at least one of the devices comprising; a diode and/or a programmable resistive element being fabricated in a contact hole at the crossovers of a plurality of the first and a plurality of second conductor lines located in more than two vertical layers; the programmable resistive element coupled to a first conductor line; and the diode including at least a first active region and a second active region isolated from the first active region, where the first active region having a first type of dopant and the second region having a second type of dopant, the first active region providing a first terminal of the diode, the second active region providing a second terminal of the diode, the first active region coupled to the programmable resistive element, and the second active region coupled to a second conductor line, wherein at least one of the programmable resistive element coupled to another programmable resistive device or shared between two programmable resistive devices whose diode being coupled to the second or a third conductor line, such coupling is facilitated by an extension that extends vertically through the second conductor line penetrating into the second conductor to couple to the PRE or the diode of the another PRD, and wherein the programmable resistive element is configured to be programmable by applying voltages to at least one of the first, the second and/or the third conductor lines to thereby change the resistance for a different logic state. - View Dependent Claims (13, 14)
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15. A method for operating a programmable resistive memory comprises:
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providing a plurality of programmable resistive memory devices, at least one of the programmable resistive devices includes at least (i) a diode and/or a programmable resistive element fabricated in a contact hole at the cross-over of a plurality of the first and a plurality of second conductor lines in more than two different vertical planes;
(ii) the programmable resistive element coupled to a first conductor line;
(iii) the diode including at least a first active region and a second active region isolated from the first active region, where the first active region having a first type of dopant and the second region having a second type of dopant, the first active region providing a first terminal of the diode, the second active region providing a second terminal of the diode, the first active region coupled to the programmable resistive element, and the second active region coupled to a second conductor line; and
(iv) at least one programmable resistive element being coupled to another programmable resistive devices or shared between two programmable resistive devices whose diode being coupled to the second or a third conductor line, such coupling is facilitated by an extension that extends vertically through the second conductor line penetrating into the second conductor to couple to the PRE or the diode of the another PRD, andprogramming a logic state into at least one of the programmable resistive devices by applying voltages to at least one of the first, the second, and/or the third conductor lines. - View Dependent Claims (16, 17, 18, 19, 20, 21, 22)
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23. An electronic system, comprising:
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a processor; and a programmable resistive memory operatively connected to the processor, the programmable resistive memory including a plurality of programmable resistive devices, at least one of the devices comprising; a diode and a programmable resistive element being fabricated in a contact hole at the crossovers of at least one first conductor line and at least one second conductor line, which are located in different vertical layers; the programmable resistive element coupled to the first conductor line; and the diode including at least a first active region and a second active region isolated from the first active region, where the first active region having a first type of dopant and the second region having a second type of dopant, the first active region providing a first terminal of the diode, the second active region providing a second terminal of the diode, the first active region coupled to the programmable resistive element, and the second active region coupled to the second conductor line, wherein at least one of the programmable resistive elements is coupled to another programmable resistive device via the second conductor line, wherein the coupling of the at least one of the programmable resistive elements to another programmable resistive device is facilitated by an extension that extends vertically through the second conductor line penetrating into the second conductor to couple to the another programmable resistive device, and wherein the programmable resistive element is configured to be programmable by applying voltages to at least one of the first conductor line and/or the second conductor line to thereby change the resistance for a different logic state. - View Dependent Claims (24, 25, 26, 27, 28)
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Specification