Systems and methods for a variable frequency multiplier power converter

• US 9,819,272 B2
• Filed: 05/09/2016
• Issued: 11/14/2017
• Est. Priority Date: 10/31/2012
• Status: Active Grant

• Current Assignee: Massachusetts Institute of Technology
• Original Assignee: Massachusetts Institute of Technology
• Inventors: Perreault, David J., Afridi, Khurram K., Gunter, Samantha J.
• Primary Examiner(s): Laxton, Gary L
• Application Number:
  US15/149,491
• Publication Number:
  US 20160254754A1
• Time in Patent Office: 554 Days
• CPC Class Codes: H02M 1/0048 Circuits or arrangements for reducing losses using snubbers H02M1/34
• CPC Class Codes: H02M 1/0054 Transistor switching losses periodically suspending operation of switching converter in low power mode H02M1/0035
• CPC Class Codes: H02M 1/0058 by employing soft switching techniques, i.e. commutation of transistors when applied voltage is zero or when current flow is zero using an auxiliary actively switched resonant commutation circuit connected to an intermediate DC voltage or between two push-pull branches of an inverter bridge H02M7/4811; in resonant inverters H02M7/4815; in inverters operating from a resonant DC source H02M7/4826
• CPC Class Codes: H02M 1/0074 Plural converter units whose inputs are connected in series
• CPC Class Codes: H02M 1/0077 Plural converter units whose outputs are connected in series
• CPC Class Codes: H02M 1/4241 using a resonant converter
• CPC Class Codes: H02M 1/44 Circuits or arrangements for compensating for electromagnetic interference in converters or inverters
• CPC Class Codes: H02M 3/07 using capacitors charged and discharged alternately by semiconductor devices with control electrode , e.g. charge pumps
• CPC Class Codes: H02M 3/33507 with automatic control of the output voltage or current, e.g. flyback converters H02M3/33561, H02M3/33569 take precedence
• CPC Class Codes: H02M 3/33523 with galvanic isolation between input and output of both the power stage and the feedback loop
• CPC Class Codes: H02M 3/3376 with automatic control of output voltage or current
• CPC Class Codes: H02M 7/217 using semiconductor devices only
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

A power converter for converting DC power to DC power includes an inverter stage having two or more switched inverters configured to receive DC power from a source and produce a switched AC output power signal. A transformation stage is coupled to receive the switched output power signal from the inverter stage, shape the output power signal, and produce a shaped power signal. A rectifier stage having two or more switched inverters coupled to receive the shaped power signal and convert the shaped power signal to a DC output power signal is included. A controller circuit is coupled to operate the power converter in a variable frequency multiplier mode where at least one of the switched inverters is switched at a frequency or duty cycle that results in an output signal having a frequency that is a harmonic of the fundamental frequency being generated by the power converter.

Claims

1. A power converter comprising:

an inverter stage having a plurality of switched inverters configured to receive receive a power input and produce an AC voltage based on the power input wherein the plurality of switched inverters comprises a first switched inverter and a second switched inverter;

a transformation stage coupled to receive the AC voltage;

a rectifier coupled to receive a signal from the transformation stage; and

a controller configured to control switching of the plurality of switched inverters and configured to change a magnitude of the AC voltage by varying the switching of the plurality of switched inverters by varying a switching frequency and a duty ratio of the plurality of switched inverters, wherein the controller is configured to reduce the magnitude of the AC voltage by a factor of two by reducing the switching frequency by a factor of two and varying the duty ratio of the plurality of switched inverters, and wherein the AC voltage is reduced by a factor of two at least in part by controlling the first switched inverter to have a duty ratio of 0.25 and controlling the second switched inverter to have a duty ratio of 0.75, and switching the first switched inverter and the second switched inverter in-phase with one another.

2. The power converter of claim 1, wherein the controller is configured to vary the switching of the plurality of switched inverters based on the power input.

3. The power converter of claim 1, wherein the power converter comprises an LLC converter.

4. The power converter of claim 1, wherein the controller is configured to vary a switching frequency of the plurality of switched inverters by an integer multiple.

5. The power converter of claim 1, wherein a frequency of the AC voltage is a harmonic of the switching frequency of the plurality of switched inverters.

6. The power converter of claim 1, wherein:

the first and second switched inverters of the plurality of switched inverters are stacked in series, the first switched inverter comprising a first plurality of field effect transistors, the second switched inverter comprising a second plurality of field effect transistors; and

in response to a signal provided thereto from said transformation stage, said rectifier produces a DC output to a power computing device.

7. The power converter of claim 1 wherein said controller circuit is further configured to drive said rectifier stage in a variable frequency multiplier mode.

8. The power converter of claim 1 wherein:

said first inverter is provided as a first half-bridge inverter and said second inverter is provided as a second half-bridge inverter; and

said controller circuit is further configured to drive said inverter stage such that;

said first and second half-bridge inverters are operated at a fundamental frequency that is half that of the desired output (TA=2T₀);

the first half-bridge inverter is controlled to have a duty ratio of 0.25 and the second half-bridge inverter is controlled to have a duty ratio of 0.75 (D1=0.25;

D2=0.75); and

the delay between the first and second half-bridge inverter is zero (i.e. Δ

t=0) such that said power converter operates in a frequency multiplier double mode of operation.

9. A method of operating a power converter, the power converter including an inverter stage having a plurality of switched inverters configured to receive a power input and produce an AC voltage based on the power input, the plurality of switched inverters comprising a first switched inverter and a second switched inverter stacked in series, the first switched inverter comprising a first plurality of field effect transistors, the second switched inverter comprising a second plurality of field effect transistors, a transformation stage coupled to receive the AC voltage, and a rectifier coupled to receive a signal from the transformation stage and produce a DC output to power a computing device, the method comprising:

controlling switching of the plurality of switched inverters by varying a switching frequency and a duty ratio of the plurality of switched inverters; and

changing a magnitude of the AC voltage by varying the switching of the plurality of switched inverters, the changing of the magnitude comprising reducing the magnitude of the AC voltage by a factor of two by reducing the switching frequency by a factor of two and varying the duty ratio of the plurality of switched inverters, and wherein the AC voltage is reduced by a factor of two at least in part by controlling the first switched inverter to have a duty ratio of 0.25 and controlling the second switched inverter to have a duty ratio of 0.75, and switching the first switched inverter and the second switched inverter in-phase with one another.

10. A power converter comprising:

an inverter stage having a plurality of switched inverters configured to receive receive a power input and produce an AC voltage based on the power input, the plurality of switched inverters comprising a first switched inverter and a second switched inverter stacked in series, the first switched inverter comprising a first plurality of field effect transistors, the second switched inverter comprising a second plurality of field effect transistors;

a transformation stage coupled to receive the AC voltage;

a rectifier coupled to receive a signal from the transformation stage and produce a DC output to power a computing device; and

a controller configured to control switching of the plurality of switched inverters and configured to change a magnitude of the AC voltage by varying the switching of the plurality of switched inverters by varying a switching frequency and a duty ratio of the plurality of switched inverters, wherein the controller is configured to reduce the magnitude of the AC voltage by a factor of two by reducing the switching frequency by a factor of two and varying the duty ratio of the plurality of switched inverters, and wherein the AC voltage is reduced by a factor of two at least in part by controlling the first switched inverter to have a duty ratio of 0.25 and controlling the second switched inverter to have a duty ratio of 0.75, and switching the first switched inverter and the second switched inverter in-phase with one another.

11. The power converter of claim 10, wherein the power converter comprises a series-resonant converter or a parallel-resonant converter.

12. The power converter of claim 11, wherein a frequency of the AC voltage is a harmonic of the switching frequency of the plurality of switched inverters.