Systems and method for fast compensation programming of pixels in a display
First Claim
1. A method of displaying an image on a display implemented in an interlacing mode, the display comprising a plurality of pixel circuits arranged in rows and columns, a first group of pixel circuits of the plurality of pixel circuits interlaced with a second group of pixel circuits of the plurality of pixel circuits, each of the pixel circuits including a light emitting device driven by a drive transistor according to programming information stored in a storage capacitor, the method comprising, during a single frame:
- programming the first group of pixel circuits during a first programming time period during which none of the pixel circuits of the first group of pixel circuits emit light;
responsive to programming the first group of pixel circuits, during a first emission time period, emitting light from the first group of pixel circuits;
programming the second group of pixel circuits after programming of the first group of pixel circuits, during a second programming time period during which none of the pixel circuits of the second group of pixels circuits emit light; and
responsive to programming the second group of pixel circuits, during a second emission time period, emitting light from the second group of pixel circuits.
2 Assignments
0 Petitions
Accused Products
Abstract
Circuits for programming a circuit with decreased programming time are provided. Such circuits include a storage device such as a capacitor for storing display information and for ensuring a driving device such as a driving transistor drives a light emitting device according to the display information. To increase programming time, the pixel circuits may be pre-charged or a biasing current may be applied to charge and/or discharge a data line and/or the driving device. Aspects of the present disclosure allow for the biasing current to drain partially through the storage device to allow the portion of the biasing current applied to the driving device to remain small while the data line discharges. Furthermore, the present disclosure provides display architectures and operation schemes for display arranged in segments each including a plurality of pixel circuits.
-
Citations
14 Claims
-
1. A method of displaying an image on a display implemented in an interlacing mode, the display comprising a plurality of pixel circuits arranged in rows and columns, a first group of pixel circuits of the plurality of pixel circuits interlaced with a second group of pixel circuits of the plurality of pixel circuits, each of the pixel circuits including a light emitting device driven by a drive transistor according to programming information stored in a storage capacitor, the method comprising, during a single frame:
-
programming the first group of pixel circuits during a first programming time period during which none of the pixel circuits of the first group of pixel circuits emit light; responsive to programming the first group of pixel circuits, during a first emission time period, emitting light from the first group of pixel circuits; programming the second group of pixel circuits after programming of the first group of pixel circuits, during a second programming time period during which none of the pixel circuits of the second group of pixels circuits emit light; and responsive to programming the second group of pixel circuits, during a second emission time period, emitting light from the second group of pixel circuits. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
-
Specification