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Leakage reduction structures for nanowire transistors

  • US 9,825,130 B2
  • Filed: 03/14/2013
  • Issued: 11/21/2017
  • Est. Priority Date: 03/14/2013
  • Status: Active Grant
First Claim
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1. A microelectronic structure, comprising:

  • a microelectronic substrate;

    at least one nanowire transistor formed on the microelectronic substrate, wherein the at least one nanowire transistor comprises;

    a source structure extending from the microelectronic substrate;

    a drain structures extending from the microelectronic substrate; and

    at least one nanowire channel extending between the source structure and the drain structure, wherein the at least one nanowire channel is disposed over a microelectronic substrate;

    a highly doped underlayer abutting the microelectronic substrate;

    a source/drain leakage barrier layer abutting the highly doped underlayer and positioned between the highly doped underlayer and the at least one nanowire channel, wherein the source/drain leakage barrier layer comprises an undoped material layer; and

    a gate electrode material surrounding the at least one nanowire channel, wherein a portion of the gate electrode material extends between the at least one nanowire channel and the source/drain leakage barrier layer.

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