Apparatus and method for testing synchronized transmission between systems operating at different clock rates
First Claim
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1. An apparatus comprising:
- a transmitting unit configured to operate at a first clock rate, the transmitting unit including a modulator and an up-converter configured to arrange a data in the form of a first sample stream containing a plurality of TDMA frames;
a receiving unit, configured to operate at a second clock rate that is different from the first clock rate, and arranged to receive the data from the transmitting unit;
a frequency generating system configured to generate the second clock rate;
a compensation circuit configured to;
receive a burst plan containing information regarding the size and/or arrangement of bursts within the plurality of frames in the first sample stream,receive the second clock rate from the frequency generating system, andsynchronize the data transmitted by the transmitting unit at the first clock rate with the second clock rate based, at least in part, on the received burst plan; and
a test circuit configured to test performance of the apparatus,wherein the compensation circuit is further configured to add samples to, or drop samples from, either the first sample stream or a second sample stream of time division multiple access (TDMA) frames during a predetermined time period, andwherein the predetermined time period corresponds to a guard period between TDMA bursts within the first sample stream, the second sample stream, or both the first sample stream and the second sample stream.
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Abstract
An apparatus and method are disclosed for testing synchronization of transmission between systems operating at different clock rates. The apparatus includes a transmitting unit configured to operate at a first clock rate, and a receiving unit configured to operate at a second clock rate that is different from the first clock rate. A compensation circuit receives a second clock rate from a frequency generating system, and synchronizes the data transmitted by the transmitting unit with the second clock rate. The synchronized data is then transmitted to the receiving unit.
46 Citations
24 Claims
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1. An apparatus comprising:
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a transmitting unit configured to operate at a first clock rate, the transmitting unit including a modulator and an up-converter configured to arrange a data in the form of a first sample stream containing a plurality of TDMA frames; a receiving unit, configured to operate at a second clock rate that is different from the first clock rate, and arranged to receive the data from the transmitting unit; a frequency generating system configured to generate the second clock rate; a compensation circuit configured to; receive a burst plan containing information regarding the size and/or arrangement of bursts within the plurality of frames in the first sample stream, receive the second clock rate from the frequency generating system, and synchronize the data transmitted by the transmitting unit at the first clock rate with the second clock rate based, at least in part, on the received burst plan; and a test circuit configured to test performance of the apparatus, wherein the compensation circuit is further configured to add samples to, or drop samples from, either the first sample stream or a second sample stream of time division multiple access (TDMA) frames during a predetermined time period, and wherein the predetermined time period corresponds to a guard period between TDMA bursts within the first sample stream, the second sample stream, or both the first sample stream and the second sample stream. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)
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16. A method comprising:
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generating data in the form of a first sample stream containing a plurality of TDMA frames using a transmitting unit that operates at a first clock rate; generating a second clock rate using a frequency generating system, the second clock rate being different from the first clock rate; receiving a burst plan containing information regarding the size and/or arrangement of bursts within the plurality of frames in the first sample stream; supplying the second clock rate to a compensation circuit; synchronizing the data received from the transmitting unit with the second clock rate using the compensation circuit based, at least in part, on the received burst plan; outputting synchronized data to a receiving unit at the second clock rate; and verifying accurate reception of the synchronized data at the receiving unit, wherein the synchronizing further includes adding samples to, or dropping samples from, either the first sample stream or a second sample stream of time division multiple access (TDMA) frames during a predetermined time period, and wherein the predetermined time period corresponds to a guard period between TDMA bursts within the first sample stream, the second sample stream, or both the first sample stream and the second sample stream. - View Dependent Claims (17, 18, 19, 20, 21, 22, 23, 24)
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Specification