Framework for runtime power monitoring and management

• US 9,829,963 B2
• Filed: 12/26/2014
• Issued: 11/28/2017
• Est. Priority Date: 12/22/2010
• Status: Expired due to Fees

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Muralidhar, Rajeev D., Seshadri, Harinarayanan, Mahalingam, Nithish, Kadam, Rushikesh S., Rudramuni, Vishwesh M., Thomas, Sujith
• Primary Examiner(s): Lee, Tammy
• Application Number:
  US14/583,296
• Publication Number:
  US 20150121114A1
• Time in Patent Office: 1,068 Days
• Field of Search: None
• CPC Class Codes: G06F 1/28 Supervision thereof, e.g. detecting power-supply failure by out of limits supervision
• CPC Class Codes: G06F 1/3206 Monitoring of events, devices or parameters that trigger a change in power modality
• CPC Class Codes: G06F 1/329 by task scheduling
• CPC Class Codes: G06F 9/5094 where the allocation takes into account power or heat criteria power management in computers in general G06F1/3203; thermal management in computers in general G06F1/206
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

Systems and methods of managing power in a computing platform may involve monitoring a runtime power consumption of two or more of a plurality of hardware components in the platform to obtain a plurality of runtime power determinations. The method can also include exposing one or more of the plurality of runtime power determinations to an operating system associated with the platform.

Claims

1. A method comprising:

monitoring a runtime power consumption of two or more processors in a platform to obtain a plurality of runtime power determinations for each of the two or more processors;

exposing two or more runtime power determinations of the plurality of runtime power determinations for each of the two or more processors to a user level power profiler, wherein the user level power profiler informs a user of an accumulation of runtime power consumption per processor over a time period via the two or more runtime power determinations of the plurality of runtime power determinations for each of the two or more processors to provide a profile of transient power at each of the two or more processors over the time period;

measuring power drawn from a voltage rail of the platform;

writing the measured power drawn to a result register entry corresponding to a hardware component coupled to the voltage rail; and

controlling the voltage rail based on a throttle value of a control register.

2. The method of claim 1, wherein for one or more of the plurality of runtime power determinations, monitoring the runtime power consumption includes:

measuring power drawn from the voltage rail of the platform, wherein the voltage rail is associated with a battery; and

writing the measured power drawn to the result register entry corresponding to the hardware component coupled to the voltage rail.

3. The method of claim 1, further including:

identifying a clock domain in the platform for two or more processors to obtain a plurality of clock determinations; and

exposing one or more of the plurality of clock determinations to an operating system.

4. An apparatus comprising:

two or more processors;

logic, implemented at least partly in one or more of configurable logic or fixed functionality logic hardware, to;

monitor a runtime power consumption of the two or more processors in a platform to obtain a plurality of runtime power determinations for each of the two or more processors;

expose two or more runtime power determinations of the plurality of runtime power determinations for each of the two or more processors to a user level power profiler, wherein the user level power profiler is to inform a user of an accumulation of runtime power consumption per processor over a time period via the two or more runtime power determinations of the plurality of runtime power determinations for each of the two or more processors to provide a profile of transient power at each of the two or more processors over the time period;

measure power drawn from a voltage rail of the platform;

write the measured power drawn to a result register entry corresponding to a hardware component coupled to the voltage rail; and

control the voltage rail based on a throttle value of a control register.

5. The apparatus of claim 4, wherein for one or more of the plurality of runtime power determinations, to monitor the runtime power consumption is to include:

a measurement of power drawn from the voltage rail of the platform, wherein the voltage rail is associated with a battery; and

a write of the measured power drawn to the result register entry corresponding to the hardware component coupled to the voltage rail.

6. The apparatus of claim 4, wherein the logic is further to:

identify a clock domain in the platform for two or more processors to obtain a plurality of clock determinations; and

expose one or more of the plurality of clock determinations to an operating system.

7. The apparatus of claim 4, wherein the logic is further to map one or more of the plurality of runtime power determinations to one or more processes to inform the user via the user level power profiler of runtime power consumption per process.

8. The apparatus of claim 4, wherein the logic is further to map one or more of the plurality of runtime power determinations to one or more applications to inform the user via the user level power profiler of runtime power consumption per application.

9. The apparatus of claim 4, wherein the platform is to include a mobile platform.

10. A non-transitory computer readable storage medium comprising a set of instructions which, if executed by a processor, cause a computer to:

monitor a runtime power consumption of two or more processors in a platform to obtain a plurality of runtime power determinations for each of the two or more processors;

expose two or more runtime power determinations of the plurality of runtime power determinations for each of the two or more processors to a user level power profiler, wherein the user level power profiler is to inform a user of an accumulation of runtime power consumption per processor over a time period via the two or more runtime power determinations of the plurality of runtime power determinations for each of the two or more processors to provide a profile of transient power at each of the two or more processors over the time period;

measure power drawn from a voltage rail of the platform;

write the measured power drawn to a result register entry corresponding to a hardware component coupled to the voltage rail; and

control the voltage rail based on a throttle value of a control register.

11. The medium of claim 10, wherein for one or more of the plurality of runtime power determinations, to monitor the runtime power consumption is to include:

a measurement of power drawn from the voltage rail of the platform, wherein the voltage rail is associated with a battery; and

a write of the measured power drawn to the result register entry corresponding to the hardware component coupled to the voltage rail.

12. The medium of claim 10, wherein the instructions, if executed, further cause a computer to:

identify a clock domain in the platform for two or more processors to obtain a plurality of clock determinations; and

expose one or more of the plurality of clock determinations to an operating system.

13. The medium of claim 10, wherein the instructions, if executed, further cause a computer to map one or more of the plurality of runtime power determinations to one or more processes to inform the user via the user level power profiler of runtime power consumption per process.

14. The medium of claim 10, wherein the instructions, if executed, further cause a computer to map one or more of the plurality of runtime power determinations to one or more applications to inform the user via the user level power profiler of runtime power consumption per application.