Power amplifier
First Claim
Patent Images
1. A power amplifier, comprising:
- a power amplifier stage; and
a matching circuit coupled to the power amplifier stage, the matching circuit configured to;
receive a signal;
perform at least one signal matching operation on the signal; and
output the signal to the power amplifier stage;
wherein the power amplifier stage is configured to;
receive the signal from the matching circuit;
amplify the signal at saturation with substantially zero amplitude-phase (AM-PM) distortion; and
output the amplified signal as an output signal;
wherein the power amplifier stage comprises;
a gate bias voltage line comprising a gate bias resistor assembly having a resistance; and
a transistor comprising a gate coupled to and biased by the gate bias voltage line such that the power amplifier stage is configured to amplify the output signal at saturation with substantially zero AM-PM distortion based at least on the resistance of the gate bias resistor assembly.
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Abstract
A power amplifier including a power amplifier stage. The power amplifier stage may be configured to receive a signal, amplify the signal at saturation with substantially zero amplitude-phase (AM-PM) distortion, and output the amplified signal as an output signal. The power amplifier may be a single stage power amplifier or a multi-stage power amplifier.
43 Citations
16 Claims
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1. A power amplifier, comprising:
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a power amplifier stage; and a matching circuit coupled to the power amplifier stage, the matching circuit configured to; receive a signal; perform at least one signal matching operation on the signal; and output the signal to the power amplifier stage; wherein the power amplifier stage is configured to; receive the signal from the matching circuit; amplify the signal at saturation with substantially zero amplitude-phase (AM-PM) distortion; and output the amplified signal as an output signal; wherein the power amplifier stage comprises; a gate bias voltage line comprising a gate bias resistor assembly having a resistance; and a transistor comprising a gate coupled to and biased by the gate bias voltage line such that the power amplifier stage is configured to amplify the output signal at saturation with substantially zero AM-PM distortion based at least on the resistance of the gate bias resistor assembly. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. An electronically scanned array, comprising:
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a plurality of antenna elements; and a plurality of power amplifiers including a power amplifier, each of the plurality of power amplifiers coupled to one or more of the plurality of antenna elements, the power amplifier comprising; a power amplifier stage; and a matching circuit coupled to the power amplifier stage, the matching circuit configured to; receive a signal; perform at least one signal matching operation on the signal; and output the signal to the power amplifier stage; wherein the power amplifier stage is configured to; receive the signal; amplify the signal at saturation with substantially zero amplitude-phase (AM-PM) distortion; and output the amplified signal as an output signal; wherein the power amplifier stage comprises; a gate bias voltage line comprising a gate bias resistor assembly having a resistance; and a transistor comprising a gate coupled to and biased by the gate bias voltage line such that the power amplifier stage is configured to amplify the signal at saturation with substantially zero AM-PM distortion based at least on the resistance of the gate bias resistor assembly. - View Dependent Claims (10, 11, 12, 13, 14)
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15. A method of operating a power amplifier, the method comprising:
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receiving, by a matching circuit, a signal, wherein the matching circuit is coupled to a power amplifier stage; perform, by the matching circuit, at least one signal matching operation on the signal; outputting, by the matching circuit, the signal to the power amplifier stage; receiving, by the power amplifier stage, the signal; amplifying, by the power amplifier stage, the signal at saturation with substantially zero amplitude-phase (AM-PM) distortion; and outputting, by the power amplifier stage, the amplified signal as an output signal, wherein the power amplifier comprises the matching circuit and the power amplifier stage comprising a gate bias voltage line and a transistor comprising a gate coupled to the gate bias voltage line, the gate bias voltage line comprising a gate bias resistor assembly having a resistance, the method further comprising; applying a gate bias voltage to the gate bias voltage line subject to the resistance of the gate bias resistor assembly, wherein amplifying the signal at saturation with substantially zero AM-PM distortion to output the amplified signal is based at least on the resistance of the gate bias resistor assembly. - View Dependent Claims (16)
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Specification