Half bridge driver circuits
First Claim
1. A half bridge GaN circuit, comprising:
- a low side circuit, comprising;
a low side switch,a low side switch driver configured to drive the low side switch,a first level shift circuit configured to receive a first level shift signal, anda second level shift circuit configured to generate a second level shift signal; and
a high side circuit, comprising;
a high side switch configured to be selectively conductive according to a voltage level of a received high side switch signal, anda high side switch driver configured to generate the high side switch signal in response to the first and second level shift signals, wherein a first transition in the voltage of the high side switch signal causes the high side switch driver to prevent additional transitions of the voltage level of the high side switch signal for a period of time.
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Accused Products
Abstract
A half bridge GaN circuit is disclosed. The circuit includes a low side circuit, which has a low side switch, a low side switch driver configured to drive the low side switch, a first level shift circuit configured to receive a first level shift signal, and a second level shift circuit configured to generate a second level shift signal. The half bridge GaN circuit also includes a high side circuit, which has a high side switch configured to be selectively conductive according to a voltage level of a received high side switch signal, and a high side switch driver configured to generate the high side switch signal in response to the level shift signals. A transition in the voltage of the high side switch signal causes the high side switch driver to prevent additional transitions of the voltage level of the high side switch signal for a period of time.
156 Citations
22 Claims
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1. A half bridge GaN circuit, comprising:
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a low side circuit, comprising; a low side switch, a low side switch driver configured to drive the low side switch, a first level shift circuit configured to receive a first level shift signal, and a second level shift circuit configured to generate a second level shift signal; and a high side circuit, comprising; a high side switch configured to be selectively conductive according to a voltage level of a received high side switch signal, and a high side switch driver configured to generate the high side switch signal in response to the first and second level shift signals, wherein a first transition in the voltage of the high side switch signal causes the high side switch driver to prevent additional transitions of the voltage level of the high side switch signal for a period of time. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A half bridge GaN circuit, comprising:
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a low side circuit, comprising; a low side switch, a low side switch driver configured to drive the low side switch, a first level shift circuit configured to receive a first level shift signal, and a second level shift circuit configured to generate a second level shift signal; and a high side circuit, comprising; a high side switch configured to be selectively conductive according to a voltage level of a received high side switch signal, and a high side switch driver configured to generate the high side switch signal in response to the first and second level shift signals, wherein a first transition in the voltage of the high side switch signal causes the high side switch driver to generate a first signal, wherein the first signal initiates a time period during which additional transitions in the voltage level of the high side switch signal are prevented, and wherein the first transition in the voltage of the high side switch signal causes the high side switch driver to generate a second signal, wherein the second signal terminates the time period. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20, 21, 22)
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Specification