Display device including transistor and manufacturing method thereof

• US 9,837,441 B2
• Filed: 04/12/2016
• Issued: 12/05/2017
• Est. Priority Date: 07/03/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Sakata, Junichiro, Sasaki, Toshinari, Hosoba, Miyuki
• Primary Examiner(s): Tran, Thanh Y
• Application Number:
  US15/096,663
• Publication Number:
  US 20160225797A1
• Time in Patent Office: 602 Days
• CPC Class Codes: H01L 21/02554 Oxides
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/02631 Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
• CPC Class Codes: H01L 27/1218 with a particular composition or structure of the substrate
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/127 with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
• CPC Class Codes: H01L 29/24 including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22 including organic materials H10K99/00
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78633 with a light shield
• CPC Class Codes: H01L 29/78645 with multiple gate
• CPC Class Codes: H01L 29/78648 arranged on opposing sides of the channel
• CPC Class Codes: H01L 29/78654 Monocrystalline silicon transistors
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

An object is to provide a display device which operates stably with use of a transistor having stable electric characteristics. In manufacture of a display device using transistors in which an oxide semiconductor layer is used for a channel formation region, a gate electrode is further provided over at least a transistor which is applied to a driver circuit. In manufacture of a transistor in which an oxide semiconductor layer is used for a channel formation region, the oxide semiconductor layer is subjected to heat treatment so as to be dehydrated or dehydrogenated; thus, impurities such as moisture existing in an interface between the oxide semiconductor layer and the gate insulating layer provided below and in contact with the oxide semiconductor layer and an interface between the oxide semiconductor layer and a protective insulating layer provided on and in contact with the oxide semiconductor layer can be reduced.

Claims

1. A method for manufacturing a semiconductor device comprising the steps of:

forming a first conductive layer comprising a first region, the first region being configured to serve as a first gate electrode;

forming a first insulating layer comprising a second region over the first conductive layer, the second region being configured to serve as a first gate insulating layer;

forming an oxide semiconductor layer over the first insulating layer;

forming a second insulating layer comprising a third region over the oxide semiconductor layer, the third region being configured to serve as a channel protective layer;

forming a second conductive layer comprising a fourth region and a third conductive layer comprising a fifth region over the second insulating layer, the fourth region being configured to serve as one of a source electrode and a drain electrode and the fifth region being configured to serve as another of the source electrode and the drain electrode;

forming a third insulating layer comprising a sixth region over the second conductive layer and the third conductive layer, the sixth region being configured to serve as a second gate insulating layer;

forming a fourth conductive layer comprising a seventh region over the third insulating layer, the seventh region being configured to serve as a second gate electrode;

forming a fourth insulating layer over the fourth conductive layer; and

forming a pixel electrode,

wherein the pixel electrode is electrically connected to the second conductive layer,

wherein each of the fourth conductive layer and the pixel electrode comprises a light-transmitting conductive material,

wherein the fourth conductive layer extends beyond both side edges of the oxide semiconductor layer in a channel width direction, and

wherein the fourth conductive layer overlaps a layer for shielding at least part of the oxide semiconductor layer from light.

2. The method for manufacturing a semiconductor device according to claim 1, wherein the fourth conductive layer and the pixel electrode are formed using a same material.

3. The method for manufacturing a semiconductor device according to claim 1, wherein the oxide semiconductor layer comprises indium, gallium, and zinc.

4. The method for manufacturing a semiconductor device according to claim 1, wherein the oxide semiconductor layer comprises indium, tin, and zinc.

5. The method for manufacturing a semiconductor device according to claim 1, wherein the oxide semiconductor layer comprises a microcrystalline region.

6. The method for manufacturing a semiconductor device according to claim 1, wherein the oxide semiconductor layer comprises an oxygen-excess region.

7. The method for manufacturing a semiconductor device according to claim 1, wherein the layer for shielding is formed using a metal or a black resin.

8. The method for manufacturing a semiconductor device according to claim 1, wherein the layer for shielding is a part of a black matrix.

9. The method for manufacturing a semiconductor device according to claim 1, wherein the first conductive layer and the fourth conductive layer are supplied with a same potential.

10. The method for manufacturing a semiconductor device according to claim 1, wherein the first conductive layer and the fourth conductive layer are supplied with a different potential.

11. A method for manufacturing a semiconductor device comprising the steps of:

forming a first conductive layer;

forming a first insulating layer over the first conductive layer;

forming an oxide semiconductor layer over the first insulating layer;

forming a second insulating layer over the oxide semiconductor layer;

forming a second conductive layer and a third conductive layer over the second insulating layer;

forming a third insulating layer over the second conductive layer and the third conductive layer;

forming a fourth conductive layer over the third insulating layer;

forming a metal layer over the third insulating layer;

forming a fourth insulating layer over the fourth conductive layer; and

forming a pixel electrode,

wherein the pixel electrode is electrically connected to the second conductive layer,

wherein each of the fourth conductive layer and the pixel electrode comprises a light-transmitting conductive material,

wherein the fourth conductive layer extends beyond both side edges of the oxide semiconductor layer in a channel width direction,

wherein the fourth conductive layer overlaps the metal layer,

wherein the first conductive layer is electrically connected to a first line, and

wherein the fourth conductive layer is electrically connected to a second line.

12. The method for manufacturing a semiconductor device according to claim 11, wherein the fourth conductive layer and the pixel electrode are formed using a same material.

13. The method for manufacturing a semiconductor device according to claim 11, wherein the oxide semiconductor layer comprises indium, gallium, and zinc.

14. The method for manufacturing a semiconductor device according to claim 11, wherein the oxide semiconductor layer comprises indium, tin, and zinc.

15. The method for manufacturing a semiconductor device according to claim 11, wherein the oxide semiconductor layer comprises a microcrystalline region.

16. The method for manufacturing a semiconductor device according to claim 11, wherein the oxide semiconductor layer comprises an oxygen-excess region.

17. The method for manufacturing a semiconductor device according to claim 11, wherein the first line and the second line are electrically connected to a same driver circuit.

18. The method for manufacturing a semiconductor device according to claim 11,

wherein the first line is electrically connected to a first driver circuit, and

wherein the second line is electrically connected to a second driver circuit.