Methods and systems for high bandwidth chip-to-chip communcations interface

• US 9,838,017 B2
• Filed: 06/07/2016
• Issued: 12/05/2017
• Est. Priority Date: 05/20/2010
• Status: Active Grant

• Current Assignee: Kandou Labs, SA
• Original Assignee: Kandou Labs, SA
• Inventors: Fox, John, Holden, Brian, Hunt, Peter, Keay, John D., Shokrollahi, Amin, Stewart, Andrew Kevin John, Surace, Giuseppe, Ulrich, Roger, Simpson, Richard
• Primary Examiner(s): Odom, Curtis
• Application Number:
  US15/176,084
• Publication Number:
  US 20160285456A1
• Time in Patent Office: 546 Days
• CPC Class Codes: G06F 13/4282 on a serial bus, e.g. I2C bus, SPI bus on daisy chain buses G06F13/4247
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 23/147 Semiconductor insulating substrates semiconductor conductive substrates H01L23/4926
• CPC Class Codes: H01L 23/5384 Conductive vias through the substrate with or without pins, e.g. buried coaxial conductors H01L23/5383, H01L23/5385 take precedence; pins attached to insulating substrates H01L23/49811
• CPC Class Codes: H01L 2924/15174 in different layers of the multilayer substrate
• CPC Class Codes: H01L 2924/15192 Resurf arrangement of the internal vias
• CPC Class Codes: H03K 19/017509 Interface arrangements
• CPC Class Codes: H03K 19/018521 of complementary type, e.g. CMOS
• CPC Class Codes: H03K 3/037 Bistable circuits
• CPC Class Codes: H04B 1/40 Circuits
• CPC Class Codes: H04L 67/12 specially adapted for proprietary or special-purpose networking environments, e.g. medical networks, sensor networks, networks in vehicles or remote metering networks
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

Systems and methods are described for transmitting data over physical channels to provide a high bandwidth, low latency interface between integrated circuit chips with low power utilization. Communication is performed using group signaling over multiple wires using a vector signaling code, where each wire carries a low-swing signal that may take on more than two signal values.

Claims

1. An apparatus comprising:

a receiver configured to receive signals via a multi-wire bus, the receive signals representing symbols of a ternary codeword of a vector signaling code, the receiver configured to detect, for each receive signal, if the signal corresponds to a low, a medium, or a high symbol value; and

a decoder configured to receive the detected symbol values of the ternary codeword, to responsively form a set of difference bits based on differences between symbol values in the received ternary codeword and symbol values in a prior received ternary codeword, and to apply the set of difference bits to a previously received data word to obtain a received data word.

2. The apparatus of claim 1, wherein the receiver comprises a corresponding pair of two-input comparators to detect each respective symbol of the codeword.

3. The apparatus of claim 1, wherein the receiver comprises, for each respective received signal:

a transistor branch connected to a high voltage, a medium voltage, and a low voltage, each transistor receiving the respective received signal as an input, the transistor branch configured to output a pair of signal level indicators identifying if the respective received signal corresponds to the low, medium, or high symbol value.

4. The apparatus of claim 1, wherein the vector signaling code is a TLT(4,1) code.

5. The apparatus of claim 4, wherein the vector signaling code is a reduced-swing (RS) code.

6. The apparatus of claim 1, wherein four signals are received via four wires of the multi-wire bus.

7. The apparatus of claim 1, wherein the applying the set of difference bits to the previously received data word comprises toggling bits of the previously received data word according to the set of difference bits to obtain the received data word.

8. The apparatus of claim 1, further comprising history flip-flops configured to store the previously received data word for at least one transmission interval.

9. The apparatus of claim 1, further comprising:

an encoder configured to convert a current input data word into a transmit code word of the vector signaling code by modifying a portion of elements of a previously transmitted code word based on a second set of difference bits representing a change of value from a previous input data word and the current input data word; and

,

a transmit driver configured to emit signals on wires of the multi-wire bus that correspond to elements of the transmit code word.

10. The apparatus of claim 9, wherein the encoder is configured to modify the portion of elements of the previously transmitted code word based on modulus addition.

11. A method comprising:

receiving signals via a multi-wire bus, the signals representing symbols of a ternary codeword of a vector signaling code, the receiver configured to detect, for each received signal, if the signal corresponds to a low, a medium, or a high symbol value;

forming a set of difference bits based on differences between symbol values in the received ternary codeword and symbol values in a prior received ternary codeword; and

applying the set of difference bits to a previously received data word to obtain a received data word.

12. The method of claim 11, wherein a symbol value of each received signal is detected using a corresponding pair of two-input comparators.

13. The method of claim 11, wherein a symbol value of each received signal is detected using a corresponding transistor branch connected to a high voltage, a medium voltage, and a low voltage, each transistor receiving the respective received signal as an input, the transistor branch configured to output a pair of signal level indicators identifying if the respective received signal corresponds to the low, medium, or high symbol value.

14. The method of claim 11, wherein the vector signaling code is a TLT(4,1) code.

15. The method of claim 14, wherein the vector signaling code is a reduced-swing (RS) code.

16. The method of claim 11, wherein the four signals are received via four wires of the multi-wire bus.

17. The method of claim 11, wherein applying the set of difference bits comprises toggling bits of the previously received data word according to the set of difference bits to obtain the received data word.

18. The method of claim 11, further comprising storing the previously received data word for at least one transmission interval using history flip-flops.

19. The method of claim 11, further comprising:

encoding a current input data word into a transmit code word of the vector signaling code by modifying a portion of elements of a previously transmitted code word based on a second set of difference bits representing a change of value from a previous input data word and the current input data word; and

,

emitting signals on wires of the multi-wire bus that correspond to elements of the transmit code word.

20. The method of claim 19, wherein the portion of element of the previously transmitted code word are modified based on modulus addition.