Conversion rate control for analog to digital conversion

• US 9,841,446 B1
• Filed: 06/13/2016
• Issued: 12/12/2017
• Est. Priority Date: 06/13/2016
• Status: Active Grant

• Current Assignee: NXP USA, Inc. (NXP Semiconductors NV)
• Original Assignee: NXP USA, Inc. (NXP Semiconductors NV)
• Inventors: Vaculik, Lukas, Tomecek, Jan
• Primary Examiner(s): Nguyen, Hoai-An D
• Application Number:
  US15/180,814
• Publication Number:
  US 20170356937A1
• Time in Patent Office: 547 Days
• Field of Search: 324 7611, 324 7612, 324 7613, 324 7615, 324 7638, 324 7639, 324 7641, 324 7642, 324 7644, 324 7647, 324600, 324612, 324613, 324614
• CPC Class Codes: G01R 13/0272 for sampling
• CPC Class Codes: G01R 13/34 Circuits for representing a single waveform by sampling, e.g. for very high frequencies
• CPC Class Codes: G01R 13/345 for displaying sampled signals by using digital processors by intermediate A.D. and D.A. convertors (control circuits for CRT indicators)
• CPC Class Codes: G01R 19/0053 Noise discrimination; Analog sampling; Measuring transients measuring characteristics of individual pulses G01R29/02; digital sampling G01R19/2509; measuring noise figure G01R29/26
• CPC Class Codes: G01R 19/2506 Arrangements for conditioning or analysing measured signals, e.g. for indicating peak values G01R19/003 takes precedence; Details concerning sampling, digitizing or waveform capturing displaying waveforms G01R13/00; analog sampling G01R19/0053
• CPC Class Codes: G01R 23/02 Arrangements for measuring frequency, e.g. pulse repetition rate; Arrangements for measuring period of current or voltage
• CPC Class Codes: H03M 1/0656 in the time domain, e.g. using intended jitter as a dither signal
• CPC Class Codes: H03M 1/12 Analogue/digital converters H03M1/001 – H03M1/10 take precedence
• CPC Class Codes: H03M 1/1255 Synchronisation of the sampling frequency or phase to the input frequency or phase

Abstract

A method, apparatus, and energy metering system obtains mains samples of a mains power line signal, performs non-white noise (NWN) filtering of the mains power line signal, obtains adjustable clock source samples of an adjustable clock signal of an adjustable clock oscillator, determines a difference based on the mains samples and the adjustable clock source samples, adjusts an adjustable clock source frequency of the adjustable clock oscillator based on the difference, and applies the adjustable clock source frequency to an analog to digital converter (ADC) to determine a conversion rate of the ADC.

Claims

1. A method comprising:

obtaining mains samples of a mains power line signal;

performing non-white noise (NWN) filtering of the mains power line signal;

obtaining adjustable clock source samples of an adjustable clock signal of an adjustable clock oscillator;

determining a difference based on the mains samples and the adjustable clock source samples;

adjusting an adjustable clock source frequency of the adjustable clock oscillator based on the difference; and

applying the adjustable clock source frequency to an analog to digital converter (ADC) to determine a conversion rate of the ADC.

2. The method of claim 1 further comprising:

obtaining a fixed number of mains samples of a mains parameter per mains period; and

performing frequency domain energy metering based on the fixed number of samples.

3. The method of claim 2 wherein the mains samples are time domain mains samples and the adjustable clock source samples are time domain adjustable clock source samples.

4. The method of claim 3 wherein the mains samples are obtained based on detection of zero crossings of a mains waveform.

5. The method of claim 1 wherein the performing the NWN filtering comprises:

performing a comparison to a maximal permissible change value.

6. The method of claim 5 wherein the maximal permissible change value provides qualification limited to a maximal mains frequency change per unit time.

7. The method of claim 1 wherein the adjustable clock oscillator is an internal resistor capacitor (IRC) timer of a microcontroller unit (MCU).

8. Apparatus comprising:

a control portion for performing non-white noise filtering and for providing a clock source value signal based on a mains frequency signal and a clock source adjustment signal;

a mains frequency timer coupled to the control portion for providing the mains frequency signal based on a mains waveform comparison signal;

a clock source control timer coupled to the control portion for providing the clock source adjustment signal based on an adjustable clock signal;

an adjustable clock oscillator for providing the adjustable clock signal and adjusting the adjustable clock signal based on the clock source value signal; and

an analog to digital converter (ADC) coupled to the adjustable clock oscillator for performing analog to digital conversions at a conversion rate based on the adjustable clock signal.

9. The apparatus of claim 8 wherein the apparatus obtains a fixed number of samples of a mains parameter per mains period and performs frequency domain energy metering based on the fixed number of samples.

10. The apparatus of claim 9 wherein the mains samples are time domain mains samples and the adjustable clock source samples are time domain adjustable clock source samples.

11. The apparatus of claim 10 wherein the mains samples are obtained based on detection of zero crossings of a mains waveform.

12. The apparatus of claim 8 wherein the control portion performs a comparison to a maximal permissible change value.

13. The apparatus of claim 12 wherein the maximal permissible change value provides qualification limited to a maximal mains frequency change per unit time.

14. The apparatus of claim 8 wherein the adjustable clock oscillator is an internal resistor capacitor (IRC) timer of a microcontroller unit (MCU).

15. An energy metering system comprising:

a control portion for performing non-white noise filtering and for providing a clock source value signal based on a mains frequency signal and a clock source adjustment signal;

a mains power line interface portion configured to be coupled to a mains power line for providing a mains waveform comparison signal;

a mains frequency timer coupled to the control portion for providing the mains frequency signal based on a mains waveform comparison signal;

a clock source control timer coupled to the control portion for providing the clock source adjustment signal based on an adjustable clock signal;

an adjustable clock oscillator for providing the adjustable clock signal and adjusting the adjustable clock signal based on the clock source value signal; and

an analog to digital converter (ADC) coupled to the adjustable clock oscillator for performing analog to digital conversions at a conversion rate based on the adjustable clock signal.

16. The energy metering system of claim 15 wherein the energy metering system obtains a fixed number of samples of a mains parameter per mains period and performs frequency domain energy metering based on the fixed number of samples.

17. The energy metering system of claim 15 wherein the mains samples are time domain mains samples and the adjustable clock source samples are time domain adjustable clock source samples.

18. The energy metering system of claim 15 wherein the mains samples are obtained based on detection of zero crossings of a mains waveform.

19. The energy metering system of claim 15 wherein the control portion performs a comparison to a maximal permissible change value.

20. The energy metering system of claim 15 wherein the maximal permissible change value provides qualification limited to a maximal mains frequency change per unit time.