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System and method for evaluating a classifier implemented within an image signal processor

  • US 9,842,280 B2
  • Filed: 11/04/2015
  • Issued: 12/12/2017
  • Est. Priority Date: 11/04/2015
  • Status: Active Grant
First Claim
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1. A system for evaluating a classifier implemented within an image signal processor (ISP) comprising:

  • a microprocessor and memory storing a training image set having a plurality of images, the microprocessor being capable of sending each of the plurality of images to the ISP, the plurality of images including Mtotal images indexable as 1, 2, . . . M; and

    machine-readable instructions stored within the memory and executed by the microprocessor capable of;

    selecting, based upon a divider position within the training image set denoted by a divider integer D between one and M+1 inclusive, the Dth image of the plurality of images;

    controlling the ISP to classify the Dth image as belonging to or not belonging to an object class;

    determining a positive-match count equal to zero when the Dth image is classified as not belonging to the object class and equal to one when the Dth image is classified as belonging to the object class;

    determining an error count based upon (a) total number of images of the training image set belonging to the object class, and (b) the positive-match count;

    repeating, for a plurality of other divider positions within the training image set, the steps of selecting, controlling, and determining to identify an optimal divider position corresponding to at least one of (a) a minimum-error count and (b) a maximum-error count, wherein total number classifier operations performed by the classifier to determine at least one of the minimum-error count and the maximum-error count equals total number of images in the training image set; and

    determining optimality of the classifier by comparing at least one of (a) optimal divider position corresponding to a minimum-error count to a predetermined optimal divider position corresponding to a predetermined minimum-error count, and (b) optimal divider position corresponding to a maximum-error count to a predetermined optimal divider position and corresponding to a predetermined maximum-error count.

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