System and method for supporting an adaptive self-tuning locking mechanism in a transactional middleware machine environment

• US 9,846,603 B2
• Filed: 06/19/2014
• Issued: 12/19/2017
• Est. Priority Date: 03/07/2012
• Status: Active Grant

• Current Assignee: Oracle International Corporation (Oracle Corporation)
• Original Assignee: Oracle International Corporation (Oracle Corporation)
• Inventors: Shen, Xugang, Zhang, Qingsheng, Jin, Yongshun
• Primary Examiner(s): Zaman, Faisal M
• Application Number:
  US14/309,328
• Publication Number:
  US 20150317191A1
• Time in Patent Office: 1,279 Days
• Field of Search: 710200, 711147, 711152, 707E17007, 707704, 707690, 707999008
• CPC Class Codes: G06F 11/073 in a memory management context, e.g. virtual memory or cache management memory management G06F12/00; testing of static memory units G11C29/00
• CPC Class Codes: G06F 11/0784 Routing of error reports, e.g. with a specific transmission path or data flow
• CPC Class Codes: G06F 11/0793 Remedial or corrective actions recovery from an exception in an instruction pipeline G06F9/3861; by retry G06F11/1402; for recovering from a failure of a protocol instance or entity H04L69/40
• CPC Class Codes: G06F 11/34 Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
• CPC Class Codes: G06F 9/52 Program synchronisation; Mutual exclusion, e.g. by means of semaphores
• CPC Class Codes: G06F 9/526 Mutual exclusion algorithms

Abstract

A system and method can support an adaptive self-tuning locking mechanism in a transactional middleware machine environment. The system allows each process in a plurality of processes to perform one or more test-and-set (TAS) operations in order to obtain a lock for data in a shared memory. Then, the system can obtain a spin failed rate for a current tuning period, wherein a spin failure happens when a process fails to obtain the lock after performing a maximum number of rounds of TAS operations that are allowed. Furthermore, the system can adaptively configuring a spin count for a next tuning period based on the obtained spin failure rate, wherein the spin count specifies the maximum number of rounds of TAS operations that are allowed for the next tuning period.

Claims

1. A method for supporting an adaptive locking mechanism in a transactional middleware machine environment, the method comprising:

monitoring performing, via each process of a plurality of processes during a first tuning period and using a first spin count, test-and-set (TAS) operations in order to obtain locks for data in a shared memory, wherein the first spin count specifies a first maximum number of rounds of the TAS operations that are allowed by each process of the plurality of processes during the first tuning period;

storing the first spin count as a last good spin count;

obtaining a first spin failure rate for the first tuning period, wherein a first spin failure comprises a process of the plurality of processes failing to obtain a lock after performing the first maximum number of rounds of the TAS operations that are allowed to the process during the first tuning period;

adaptively configuring a second spin count for a second tuning period after the first tuning period based on the obtained first spin failure rate, wherein the second spin count is different than the last good spin count and specifies a second maximum number of rounds of the TAS operations that are allowed by each process of the plurality of processes during the second tuning period;

monitoring performing, via each process of the plurality of processes during the second tuning period and using the second spin count, the TAS operations in order to obtain locks for the data in the shared memory;

obtaining a second spin failure rate for the second tuning period, wherein a second spin failure comprises a process of the plurality of processes failing to obtain a lock after performing the second maximum number of rounds of the TAS operations that are allowed to the process during the second tuning period;

selectively configuring a next spin count for a next tuning period after the second tuning period to be the second spin count and storing the second spin count as the last good spin count responsive to the second spin failure rate being less than the first spin failure rate; and

selectively configuring the next spin count for the next tuning period after the second tuning period to be the last good spin count responsive to the second spin failure rate being greater than the first spin failure rate.

2. The method of claim 1, further comprising:

using an assembly component to perform said TAS operations.

3. The method of claim 1, further comprising:

preconfiguring the first spin count using metadata.

4. The method of claim 1, further comprising:

determining whether an idle CPU rate for the first tuning period is more than a user-configured minimum idle CPU rate and whether the first spin failure rate for the first tuning period meets a user-configured target.

5. The method of claim 4, further comprising:

when the idle CPU rate for the first tuning period is more than the user-configured minimum idle CPU rate and the first spin failure rate for the first tuning period does not meet the user-configured target, increasing the first spin count to the second spin count;

if the first spin failure rate for the first tuning period is better than a last good spin failure rate, or

if the first spin failure rate for the first tuning period becomes worse without tuning.

6. The method of claim 5, further comprising:

dividing a range for possible second spin count values into several intervals, and

using a different formula to calculate a tuned spin count value in each different interval.

7. The method of claim 1, further comprising:

decreasing the first spin count to a decreased spin count as the second spin count, if at least one of

an application is idle,

an idle CPU ratio is less than a user-configured minimum idle CPU rate and a user CPU ratio is sufficient, and

the first spin count has been kept stable for a predetermined period of time.

8. The method of claim 1, further comprising:

keeping the first spin count as the second spin count, if at least one of

the second spin failure rate for the second tuning period meets a predetermined requirement,

the second spin count for the second tuning period reaches a predetermined top or bottom spin count limitation, or

the second spin failure rate for the second tuning period is stable.

9. The method of claim 1, further comprising:

waiting, via a first process of the plurality of processes with a spin failure, in a semaphore waiting queue for a release of a lock on the data in the shared memory; and

accessing the data in the shared memory by the first process, when a lock owner releases the lock on the data.

10. The method of claim 9, further comprising:

applying extra spin counts on each process of the plurality of processes performing the TAS operations, when the semaphore waiting queue is not empty.

11. A system for providing an adaptive locking mechanism in a transactional middleware machine environment, comprising:

one or more processors;

a plurality of processes, wherein each process in the plurality of processes operates to perform test-and-set (TAS) operations during a first tuning period and using a first spin count specifying a first maximum number of rounds of the TAS operations that are allowed during the first tuning period in order to obtain locks for data in a shared memory, wherein each process in the plurality of processes operates to perform the one or more test-and-set (TAS) operations in order to obtain locks for the data in the shared memory during a second tuning period after the first tuning period and using a second spin count specifying a second maximum number of rounds of the TAS operations that are allowed during the second tuning period;

a transactional server, running on the one or more processors, the transactional server being operate to;

store the first spin count as a last good spin count;

obtain a first spin failure rate for the first tuning period, wherein a first spin failure comprises a process of the plurality of processes failing to obtain a lock after performing the first maximum number of rounds of the TAS operations that are allowed to the process during the first tuning period;

adaptively configure the second spin count for the second tuning period after the first tuning period based on the obtained first spin failure rate wherein the second spin count is different than the last good spin count;

obtain a second spin failure rate for the second tuning period, wherein a second spin failure comprises a process of the plurality of processes failing to obtain a lock after performing the second maximum number of rounds of the TAS operations that are allowed to the process during the second tuning period;

selectively configure a next spin count for a next tuning period after the second tuning period to be the second spin count and storing the second spin count as the last good spin count responsive to the second spin failure rate being less than the first spin failure rate;

selectively configure the spin count for the next tuning period after the second tuning period to be the last good spin count responsive to the second spin failure rate being greater than the first spin failure rate.

12. The system of claim 11, wherein:

an assembly component is used to perform said TAS operations.

13. The system of claim 11, wherein:

the first spin count is preconfigured using metadata.

14. The system of claim 11, wherein:

the managing component operates to determine whether an idle CPU rate for the first tuning period is more than a user-configured minimum idle CPU rate and whether the first spin failure rate for the first tuning period meets a user-configured target.

15. The system of claim 14, wherein:

when the idle CPU rate for the first tuning period is more than the user-configured minimum idle CPU rate and the first spin failure rate for the first tuning period does not meet the user-configured target, the managing component operates to increase the first spin count to the second spin count;

if the first spin failure rate for the first tuning period is better than a last good spin failure rate, or

if the first spin failure rate for the first tuning period becomes worse without tuning.

16. The system of claim 15, wherein:

a range for possible second spin count values is divided into several intervals, and the managing component operates to use a different formula to calculate a tuned spin count value in each different interval.

17. The system of claim 11, wherein:

the managing component operates to decrease the first spin count to the second spin count, if at least one of

an application is idle,

an idle CPU ratio is less than a user-configured minimum idle CPU rate and a user CPU ratio is sufficient, and

the first spin count has been kept stable for a predetermined period of time.

18. The system of claim 11, wherein:

the managing component operates to keep the first spin count as the second spin count, if at least one of;

the second spin failure rate for the second tuning period meets a predetermined requirement,

the second spin count for the second tuning period reaches a predetermined top or bottom spin count limitation, and

the second spin failure rate for the second tuning period is stable.

19. The system of claim 11, wherein:

the managing component operates to

put a first process of the plurality of processes with a spin failure to wait in a semaphore waiting queue for a release of a lock on the data in the shared memory;

access the data in the shared memory by the first process, when a lock owner releases the lock on the data; and

apply extra spin counts on the processes performing the TAS operation, when the semaphore waiting queue is not empty.

20. A non-transitory machine readable storage medium having instructions stored thereon that when executed cause a system to perform steps comprising:

monitoring performing, via each process of a plurality of processes during a first tuning period and using a first spin count, test-and-set (TAS) operations in order to obtain locks for data in a shared memory, wherein the first spin count specifies a first maximum number of rounds of the TAS operations that are allowed to each process of the plurality of processes during the first tuning period;

storing the first spin count as a last good spin count;

obtaining a first spin failure rate for the first tuning period, wherein a first spin failure comprises a process of the plurality of processes failing to obtain the a lock after performing the first maximum number of rounds of the TAS operations that are allowed to the process during the first tuning period;

adaptively configuring a second spin count for a second tuning period after the first tuning period based on the obtained first spin failure rate, wherein the second spin count is different than the last good spin count and specifies a second maximum number of rounds of the TAS operations that are allowed to each process of the plurality of processes during the second tuning period;

monitoring performing, via each process of the plurality of processes during the second tuning period and using the second spin count, the TAS operations in order to obtain locks for the data in the shared memory;

obtaining a second spin failure rate for the second tuning period, wherein a second spin failure comprises a process of the plurality of processes failing to obtain a lock after performing the second maximum number of rounds of the TAS operations that are allowed to the process during the second tuning period;

selectively configuring a next spin count for a next tuning period after the second tuning period to be the second spin count and storing the second spin count as the last good spin count responsive to the second spin failure rate being less than the first spin failure rate;

selectively configuring the next spin count for the next tuning period after the second tuning period to be the last good spin count responsive to the second spin failure rate being greater than the first spin failure rate.