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Memory device and method for operating the same

  • US 9,847,118 B1
  • Filed: 12/21/2016
  • Issued: 12/19/2017
  • Est. Priority Date: 07/12/2016
  • Status: Active Grant
First Claim
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1. A memory device comprising:

  • a cell array comprising a main area and an adjacent area with a plurality of main memory cells disposed in the main area and a plurality of adjacent memory cells disposed in the adjacent area;

    a control circuit suitable for controlling a row operation and column operation of the cell array; and

    an adjacent area controller suitable for controlling adjacent memory cells so that the adjacent memory cells are operated under a different condition from the main memory cells,wherein the adjacent memory cells are disposed adjacent the control circuit and the adjacent area controller stores the addresses of the adjacent memory cells.

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