Electro-mechanical voltage-controlled oscillator and a method for generating tunable balanced oscillations

• US 9,847,753 B2
• Filed: 08/08/2016
• Issued: 12/19/2017
• Est. Priority Date: 12/23/2013
• Status: Active Grant

• Current Assignee: Microsemi Storage Solutions, Inc (Microchip Technology Incorporated)
• Original Assignee: Maxlinear Asia Singapore Pte Ltd. (Maxlinear Incorporated)
• Inventors: Ho, Stanley, Djahanshahi, Hormoz
• Primary Examiner(s): SHIN, JEFFREY M
• Application Number:
  US15/231,250
• Publication Number:
  US 20170033741A1
• Time in Patent Office: 498 Days
• CPC Class Codes: H03B 5/364 the amplifier comprising field effect transistors H03B5/366 takes precedence
• CPC Class Codes: H03B 5/368 the means being voltage variable capacitance diodes
• CPC Class Codes: H03K 4/50 in which a sawtooth voltage is produced across a capacitor

Abstract

A cross-coupled complementary balanced voltage-controlled oscillator and a method for operating same. The oscillator comprises an electro-mechanical resonator, and an oscillator core. The oscillator core comprises capacitvely cross-coupled complementary inverters and a resistor network. The oscillator may comprise a frequency tuning network having inductors for increasing the tuning range. The capacitance inhibit the inverters from latching to a static direct current state. The resistor network forms a high pass filter with the capacitance to inhibit relaxation oscillations. The method comprises enabling the resistor network to form a high pass filter and starting balanced oscillations in the oscillator, the capacitance of the high pass filter for inhibiting latching, and the high pass filter for inhibiting relaxation oscillations. The method may comprise tuning the frequency by varying the capacitance of the oscillator.

Claims

1. An oscillator for generating balanced oscillations, the oscillator comprising:

a resonator input configured to receive, from an electro-mechanical resonator, a signal for creating oscillations in the oscillator;

an oscillator core connected to the electro-mechanical resonator for starting and sustaining balanced oscillations in the oscillator, the oscillator core comprising first and second cross-coupled complementary inverters forming a loop, each inverter comprising an output;

first and second capacitors connected in series in the loop to the outputs of the first and second cross-coupled complementary inverters, respectively, and configured to inhibit the cross-coupled complementary inverters from latching to a static direct current state when starting oscillations;

a resistor network configured to connect the output of the first inverter to the output of the second inverter for creating a high pass filter with the capacitors to inhibit relaxation-mode oscillations, wherein the resistor network comprises a switchable connection which connects the outputs of the first and second inverters when enabled; and

a controller connected to the resistor network and configured to enable the switchable connection when starting the oscillations to create a high pass filter with the capacitors to inhibit relaxation-mode oscillations.

2. The oscillator of claim 1, wherein the first and second capacitors are connected in series in the loop to outputs of the first and second cross-coupled complementary inverters, respectively, to break a positive feedback loop at DC between the cross-coupled complementary inverters.

3. The oscillator of claim 1, wherein the controller disables the switchable connection when steady-state gain at the balanced oscillation frequency is at unity gain and gain at the relaxation frequency is less than unity gain.

4. The oscillator of claim 1, wherein the inverters each comprise an NMOS transistor and a PMOS transistor connected to each other at their drains, the oscillator further comprising an electronic element connected to a source of each NMOS transistor for varying the amplitude of, and reducing phase noise in the balanced oscillations, wherein the electronic element is at least one of a current source, a resistor, a variable resistor, and an array of switchable transistors.

5. The oscillator of claim 1, wherein the inverters each comprise an NMOS transistor and a PMOS transistor connected to each other at their drains, the oscillator further comprising an electronic element connected to a source of each of the PMOS transistors for varying the amplitude of, and reducing phase noise in the balanced oscillations, wherein the electronic element is at least one of a current source, a resistor, a variable resistor, and an array of switchable transistors.

6. The oscillator of claim 1, further comprising first and second self-biasing feedback resistors connected in parallel with the first and second inverters, respectively, to bias the first and second inverters at maximum small-signal gain operating point such that the oscillator experiences maximum loop gain to start balanced oscillations.

7. The oscillator of claim 1, wherein the balanced oscillations have a frequency, the oscillator further comprising a frequency tuning network connected to the resonator input for tuning the frequency of the balanced oscillations.

8. The oscillator of claim 1, wherein the resistor network comprises a first resistor and a second resistor configured to connect the output of the first cross-coupled complementary inverter to the output of the second cross-coupled complementary inverter, respectively;

and

the switchable connection comprises first and second switches connected to the first and second resistors, respectively, the first and second switches for connecting the first and second resistors in series when the switches are enabled.

9. The oscillator of claim 7, wherein the frequency tuning network comprises:

a capacitor network having one or more switchable capacitors connected to the resonator input; and

a second controller for enabling the switchable capacitor connection to decrease the frequency of the balanced oscillations in the oscillator, and for disabling the switchable capacitor connection to increase the frequency of the balanced oscillations in the oscillator.

10. The oscillator of claim 9, wherein the capacitor network comprises switched capacitors and a voltage-controlled variable capacitor.

11. The oscillator of claim 7, wherein the frequency tuning network comprises an inductor in series with each terminal of the resonator input for increasing the inductance in the oscillator to reduce the amount of capacitance needed to achieve a lower limit frequency of balanced oscillations, while maintaining the amount of capacitance needed to achieve an upper limit frequency of balanced oscillations.

12. The oscillator of claim 7, wherein the frequency tuning network further comprises a resistor connected to the resonator input for delaying the phase of balanced oscillations at a desired frequency to inhibit the balanced oscillations from occurring at an undesired frequency.

13. A method for generating balanced oscillations in an oscillator, comprising:

starting operation of the oscillator to generate oscillations using an electromechanical resonator and an oscillator core, the oscillator starting operation in balanced mode;

during starting operation of the oscillator in balanced mode, inhibiting the oscillator from latching to a static direct current state using a capacitance in the oscillator core;

during starting operation of the oscillator in balanced mode, inhibiting relaxation oscillations in the oscillator using a high pass filter;

wherein inhibiting relaxation oscillations comprises enabling a resistor network to create the high pass filter with the capacitance to inhibit relaxation oscillations in the oscillator, and

in response to balanced oscillations in the oscillator at steady state, disabling the resistor network to disable the high pass filter in the oscillator core to reduce phase noise and increase the amplitude of the balanced oscillations.

14. The method of claim 13, wherein the resistor network is disabled to disconnect the high pass filter from the oscillator core when oscillator loop gain at the balanced oscillation frequency is unity gain and gain at any other frequency is less than unity gain.

15. The method of claim 14, wherein activating and deactivating a switch connects and disconnects the resistor network from the oscillator core, respectively.

16. The method of claim 13, wherein the balance oscillations have a frequency and tuning the frequency of the balanced oscillations in the oscillator comprises varying a second capacitance in a frequency tuning network of the oscillator.

17. The method of claim 16, further comprising tuning the frequency of the balanced oscillations in the oscillator based on a selected inductance in the frequency tuning network of the oscillator.

18. An oscillator for generating balanced oscillations, the oscillator comprising:

a resonator input configured to receive, from an electro-mechanical resonator, a signal for creating oscillations in the oscillator;

an oscillator core connected to the electro-mechanical resonator for starting and sustaining balanced oscillations in the oscillator, the oscillator core comprising first and second cross-coupled complementary inverters forming a loop, each inverter comprising an output;

first and second capacitors connected in series in the loop to the outputs of the first and second cross-coupled complementary inverters, respectively, and configured to inhibit the cross-coupled complementary inverters from latching to a static direct current state when starting oscillations;

a resistor network configured to connect the output of the first inverter to the output of the second inverter for creating a high pass filter with the capacitors to inhibit relaxation-mode oscillations; and

a frequency tuning network connected to the resonator input, wherein;

the balanced oscillations have a frequency,

the frequency tuning network is configured for tuning the frequency of the balanced oscillations, and

the frequency tuning network comprises an inductor in series with each terminal of the resonator input for increasing the inductance in the oscillator to reduce the amount of capacitance needed to achieve a lower limit frequency of balanced oscillations, while maintaining the amount of capacitance needed to achieve an upper limit frequency of balanced oscillations.

19. The oscillator of claim 18, wherein the first and second capacitors are connected in series in the loop to outputs of the first and second cross-coupled complementary inverters, respectively, to break a positive feedback loop at DC between the cross-coupled complementary inverters.

20. The oscillator of claim 18, wherein the inverters each comprise an NMOS transistor and a PMOS transistor connected to each other at their drains, the oscillator further comprising an electronic element connected to a source of each NMOS transistor for varying the amplitude of, and reducing phase noise in the balanced oscillations, wherein the electronic element is at least one of a current source, a resistor, a variable resistor, and an array of switchable transistors.

21. The oscillator of claim 18, wherein the inverters each comprise an NMOS transistor and a PMOS transistor connected to each other at their drains, the oscillator further comprising an electronic element connected to a source of each of the PMOS transistors for varying the amplitude of, and reducing phase noise in the balanced oscillations, wherein the electronic element is at least one of a current source, a resistor, a variable resistor, and an array of switchable transistors.

22. The oscillator of claim 18, further comprising first and second self-biasing feedback resistors connected in parallel with the first and second inverters, respectively, to bias the first and second inverters at maximum small-signal gain operating point such that the oscillator experiences maximum loop gain to start balanced oscillations.

23. The oscillator of claim 18, wherein the frequency tuning network comprises:

a capacitor network having one or more switchable capacitors connected to the resonator input; and

a second controller for enabling the switchable capacitor connection to decrease the frequency of the balanced oscillations in the oscillator, and for disabling the switchable capacitor connection to increase the frequency of the balanced oscillations in the oscillator.

24. The oscillator of claim 23, wherein the capacitor network comprises switched capacitors and a voltage-controlled variable capacitor.

25. The oscillator of claim 18, wherein the frequency tuning network further comprises a resistor connected to the resonator input for delaying the phase of balanced oscillations at a desired frequency to inhibit the balanced oscillations from occurring at an undesired frequency.

26. An oscillator for generating balanced oscillations, the oscillator comprising:

a resonator input configured to receive, from an electro-mechanical resonator, a signal for creating oscillations in the oscillator;

an oscillator core connected to the electro-mechanical resonator for starting and sustaining balanced oscillations in the oscillator, the oscillator core comprising first and second cross-coupled complementary inverters forming a loop, each inverter comprising an output;

first and second capacitors connected in series in the loop to the outputs of the first and second cross-coupled complementary inverters, respectively, and configured to inhibit the cross-coupled complementary inverters from latching to a static direct current state when starting oscillations;

a resistor network configured to connect the output of the first inverter to the output of the second inverter for creating a high pass filter with the capacitors to inhibit relaxation-mode oscillations; and

a frequency tuning network connected to the resonator input, wherein;

the balanced oscillations have a frequency,

the frequency tuning network is configured for tuning the frequency of the balanced oscillations, and

the frequency tuning network comprises a resistor connected to the resonator input for delaying the phase of balanced oscillations at a desired frequency to inhibit the balanced oscillations from occurring at an undesired frequency.

27. The oscillator of claim 26, wherein the first and second capacitors are connected in series in the loop to outputs of the first and second cross-coupled complementary inverters, respectively, to break a positive feedback loop at DC between the cross-coupled complementary inverters.

28. The oscillator of claim 26, wherein the inverters each comprise an NMOS transistor and a PMOS transistor connected to each other at their drains, the oscillator further comprising an electronic element connected to a source of each NMOS transistor for varying the amplitude of, and reducing phase noise in the balanced oscillations, wherein the electronic element is at least one of a current source, a resistor, a variable resistor, and an array of switchable transistors.

29. The oscillator of claim 26, wherein the inverters each comprise an NMOS transistor and a PMOS transistor connected to each other at their drains, the oscillator further comprising an electronic element connected to a source of each of the PMOS transistors for varying the amplitude of, and reducing phase noise in the balanced oscillations, wherein the electronic element is at least one of a current source, a resistor, a variable resistor, and an array of switchable transistors.

30. The oscillator of claim 26, further comprising first and second self-biasing feedback resistors connected in parallel with the first and second inverters, respectively, to bias the first and second inverters at maximum small-signal gain operating point such that the oscillator experiences maximum loop gain to start balanced oscillations.

31. The oscillator of claim 26, wherein the frequency tuning network comprises:

a capacitor network having one or more switchable capacitors connected to the resonator input; and

a second controller for enabling the switchable capacitor connection to decrease the frequency of the balanced oscillations in the oscillator, and for disabling the switchable capacitor connection to increase the frequency of the balanced oscillations in the oscillator.

32. The oscillator of claim 31, wherein the capacitor network comprises switched capacitors and a voltage-controlled variable capacitor.