Methods and apparatus related to virtualization of data center resources

• US 9,847,953 B2
• Filed: 06/30/2009
• Issued: 12/19/2017
• Est. Priority Date: 09/11/2008
• Status: Active Grant

• Current Assignee: Juniper Networks Incorporated
• Original Assignee: Juniper Networks Incorporated
• Inventors: Sindhu, Pradeep, Aybay, Gunes, Frailong, Jean-Marc, Venkatramani, Anjan, Vohra, Quaizar
• Primary Examiner(s): Sloms, Nicholas
• Application Number:
  US12/495,364
• Publication Number:
  US 20100061389A1
• Time in Patent Office: 3,094 Days
• Field of Search: None
• CPC Class Codes: H04L 49/00 Packet switching elements
• CPC Class Codes: H04L 49/1515 Non-blocking multistage, e.g. Clos
• CPC Class Codes: H04L 49/251 Cut-through or wormhole routing
• CPC Class Codes: H04L 49/35 Switches specially adapted for specific applications
• CPC Class Codes: H04L 49/356 for storage area networks
• CPC Class Codes: H04L 49/70 Virtual switches

Abstract

In one embodiment, an apparatus includes a switch core that has a multi-stage switch fabric. A first set of peripheral processing devices coupled to the multi-stage switch fabric by a set of connections that have a protocol. Each peripheral processing device from the first set of peripheral processing devices is a storage node that has virtualized resources. The virtualized resources of the first set of peripheral processing devices collectively define a virtual storage resource interconnected by the switch core. A second set of peripheral processing devices coupled to the multi-stage switch fabric by a set of connections that have the protocol. Each peripheral processing device from the first set of peripheral processing devices is a compute node that has virtualized resources. The virtualized resources of the second set of peripheral processing devices collectively define a virtual compute resource interconnected by the switch core.

Claims

1. An apparatus, comprising:

a first switch core having a multi-stage switch fabric, the first switch core configured to be logically partitioned into a first virtual switch core and a second virtual switch core, the first virtual switch core and the second virtual switch core being logical partitions of the first switch core and not a second switch core; and

a processor remote from and operatively coupled to the first switch core, the processor, when operative, assigning a first plurality of peripheral processing devices coupled to the first virtual switch core of the multi-stage switch fabric, to a first virtual application cluster (VAC) of the first virtual switch core, the first VAC of the first virtual switch core being controlled by a first administration entity and defining a first resource of a first resource type that includes a first set of physical resources of the first switch core that are interconnected;

the processor, when operative, assigning a second plurality of peripheral processing devices coupled to the first virtual switch core of the multi-stage switch fabric, to a second VAC of the first virtual switch core being controlled by a second administration entity different from the first administration entity, the second VAC associated with the first virtual switch core and defining a resource of a second resource type that includes a second set of physical resources of the first virtual switch core that are different from the first set of physical resources, the second plurality of peripheral processing devices including a subset of the first plurality of peripheral processing devices coupled to the first virtual switch core;

the processor, when operative, assigning a third plurality of peripheral processing devices coupled to the second virtual switch core of the multi-stage switch fabric, to a VAC of the second virtual switch core, the VAC of the second virtual switch core defining a second resource of the first resource type that includes a set of physical resources of the second virtual switch core that are interconnected;

the second VAC is associated with the first virtual switch core at a first time;

the second VAC is associated with the second virtual switch core at a second time different from the first time; and

the second plurality of peripheral processing devices is de-allocated from the first virtual switch core at the second time as a result of the second VAC being associated with the second virtual switch core.

2. The apparatus of claim 1, wherein:

each peripheral processing device from the first plurality of peripheral processing devices having virtualized resources, each peripheral processing device from the first plurality of peripheral processing devices is configured such that its virtualized resources is substitutable with virtual resources from the remaining peripheral processing devices in the first plurality of peripheral processing devices; and

each peripheral processing device from the second plurality of peripheral processing having virtualized resources, each peripheral processing device from the second plurality of peripheral processing devices is configured such that its virtualized resources is substitutable with virtual resources from the remaining peripheral processing devices in the second plurality of peripheral processing devices.

3. The apparatus of claim 1, wherein:

the first plurality of peripheral processing devices being associated with a packet-based communication protocol and associated with a security protocol; and

the second plurality of peripheral processing devices being associated with the packet-based communication protocol and associated with the security protocol.

16. The apparatus of claim 1, wherein:

the first virtual switch core represents a logical group of a first plurality of portions of a data center, the first plurality of portions of the data center including the first virtual switch core and not the second virtual switch core,

the second virtual switch core represents a logical group of a second plurality of portions of the data center, the second plurality of portions of the data center including the second virtual switch core and not the first virtual switch core, and

the first virtual switch core is managed based on a policy configured to operate based on time thresholds.

17. The apparatus of claim 1, wherein:

the resource of the first resource type being a virtual compute resource being formed from virtualized resources of the first plurality of peripheral processing devices, each peripheral processing device from the first plurality of peripheral processing devices being a compute node type,

the resource of the second resource type being a virtual storage resource being formed from virtualized resources of the second plurality of peripheral processing devices, each peripheral processing device from the second plurality of peripheral processing devices being a storage node type.

4. An apparatus, comprising:

a first switch core having a multi-stage switch fabric, and configured to be logically partitioned into a first virtual switch core and a second virtual switch core, the first virtual switch core and the second virtual switch core being logical partitions of the first switch core and not a second switch core;

a first plurality of peripheral processing devices coupled to the first virtual switch core of the multi-stage switch fabric by a plurality of connections, each peripheral processing device from the first plurality of peripheral processing devices being a first node type, each peripheral processing device from the first plurality of peripheral processing devices being associated with a first virtual application cluster (VAC) of the first virtual switch core, the first VAC of the first virtual switch core being controlled by a first administration entity and defining a first resource of a first resource type that includes a first set of physical resources of the first switch core;

a second plurality of peripheral processing devices different from the first plurality of peripheral processing devices and coupled to the second virtual switch core of the multi-stage switch fabric by a plurality of connections, each peripheral processing device from the second plurality of peripheral processing devices being a second node type, each peripheral processing device from the second plurality of peripheral processing devices being associated with a VAC of the second virtual switch core, the VAC of the second virtual switch core being controlled by a second administration entity different from the first administration entity and defining a second resource of the first resource type that includes a second set of physical resources of the first switch core different from the first set of physical resources; and

a third plurality of peripheral processing devices coupled to the first virtual switch core of the multi-stage switch fabric and associated with a second VAC of the first virtual switch core, the third plurality of peripheral processing devices including a subset of the first plurality of peripheral processing devices coupled to the first virtual switch core, the second VAC of the first virtual switch core defining a resource of a second resource type that includes a third set of physical resources of the first switch core different from the second set of physical resources;

the second VAC is associated with the first virtual switch core at a first time;

the second VAC is associated with the second virtual switch core at a second time different from the first time; and

the third plurality of peripheral processing devices is de-allocated from the first virtual switch core at the second time as a result of the second VAC being associated with the second virtual switch core.

5. The apparatus of claim 4, wherein:

each peripheral processing device from the first plurality of peripheral processing devices being a storage node having virtualized resources, the virtualized resources of the first plurality of peripheral processing resources collectively defining a virtual storage resource interconnected by the first switch core, and

each peripheral processing device from the second plurality of peripheral processing devices being a compute node having virtualized resources, the virtualized resources of the second plurality of peripheral processing resources collectively defining a virtual compute resource interconnected by the first switch core.

6. The apparatus of claim 4, wherein:

each peripheral processing device from the first plurality of peripheral processing devices having virtualized resources, each peripheral processing device from the first plurality of peripheral processing devices is configured such that its virtualized resources is substitutable with virtual resources from the remaining peripheral processing devices in the first plurality of peripheral processing devices; and

each peripheral processing device from the second plurality of peripheral processing having virtualized resources, each peripheral processing device from the second plurality of peripheral processing devices is configured such that its virtualized resources is substitutable with virtual resources from the remaining peripheral processing devices in the second plurality of peripheral processing devices.

7. The apparatus of claim 4, wherein:

the first node type is one of a computer node type, a storage node type, a service node type and a router type, and

the second node type is one remaining from the computer node type, the storage node type, the service node type and the router type.

8. The apparatus of claim 4, wherein:

the first node type is a computer node type,

the second node type is a storage node type, and

each of the first plurality of peripheral processing devices and the second plurality of peripheral processing devices is coupled to the first virtual switch core and the second virtual switch core, respectively of the multi-stage switch fabric by a plurality of connections associated with an Ethernet protocol having a bandwidth of at least 10 Gb/s.

9. An apparatus, comprising:

a first switch core having a multi-stage switch fabric, the first switch core configured to be logically partitioned into a first virtual switch core and a second virtual switch core, the first virtual switch core and the second virtual switch core being logical partitions of the first switch core and not a second switch core;

a plurality of peripheral processing devices coupled to the multi-stage switch fabric, the plurality of peripheral processing devices having a first subset of peripheral processing devices operatively coupled to the first virtual switch core, a second subset of peripheral processing devices different from the first subset of peripheral processing devices and operatively coupled to the second virtual switch core, and a third subset of peripheral processing devices different from the first subset of peripheral processing devices and the second subset of peripheral processing devices and operatively coupled to the first virtual switch core,

the first subset of peripheral processing devices being assigned to a first virtual application cluster (VAC) of the first virtual switch core, the first VAC of the first virtual switch core being controlled by a first administration entity and defining a first resource of a first resource type that includes a first set of physical resources of the first switch core, the third subset of peripheral processing devices being assigned to a second VAC of the first virtual switch core, the second VAC of the first virtual switch core being controlled by a second administration entity different from the first administration entity and defining a resource of a second resource type that includes a second set of physical resources of the first switch core different from the first set of physical resources;

the second subset of peripheral processing devices being assigned to a VAC of the second virtual switch core, the VAC of the second virtual switch core defining a second resource of the first resource type that includes a third set of physical resources of the first switch core different from the first set of physical resources and the second set of physical resources;

the second VAC is associated with the first virtual switch core at a first time;

the second VAC is associated with the second virtual switch core at a second time different from the first time; and

the third plurality of peripheral processing devices is de-allocated from the first virtual switch core at the second time as a result of the second VAC being associated with the second virtual switch core.

10. The apparatus of claim 9, wherein:

the first switch core is configured such that the first virtual switch core and the second virtual switch core each is administratively managed independently from the other.

11. The apparatus of claim 9, wherein:

the first switch core is configured such that the first virtual switch core has a bandwidth independent from a bandwidth of the second virtual switch core.

12. The apparatus of claim 9, wherein:

the first switch core is configured such that the first virtual switch core has a bandwidth and administrative management independent from a bandwidth and an administrative management of the second virtual switch core.

13. The apparatus of claim 9, wherein:

the first switch core is configured such that the first virtual switch core operates with layer-2 protocol and the second virtual switch core operates with layer-2 protocol and layer-3 protocol.

14. The apparatus of claim 9, wherein:

the first subset of peripheral processing devices having virtual resources, the second subset of peripheral processing devices having virtual resources.

15. The apparatus of claim 9, wherein:

the first subset of peripheral processing devices includes a peripheral processing device that is one of a compute node, a storage node, service node and a router, and includes a peripheral processing device that is a remaining one of a compute node, a storage node, service node and a router; and

the second subset of peripheral processing devices includes a peripheral processing device that is one of a compute node, a storage node, service node and a router, and includes a peripheral processing device that is a remaining one of a compute node, a storage node, service node and a router.