Method for hermetically sealing with reduced stress
First Claim
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1. An electronic device comprising:
- a first substrate having a device area,a first sealing means for sealing the device area, the first sealing means having an inner side facing the device area and an outer side facing away from the device area, the first sealing means comprisinga first sealing element being positioned on the first substrate, the first sealing element forming a closed loop surrounding the device area and comprising an anelastic material,a second sealing element being a metal, the second sealing element being in contact with the first sealing element along the closed loop,a second substrate positioned on the first sealing means so as to sandwich the first sealing means between the first and the second substrate for hermetically sealing the device area,wherein the first sealing element and the second sealing element are arranged such that one upright wall of the first sealing element is covered by the second sealing element such that the inner side or the outer side of the first sealing means is completely formed by the second sealing element and the other side is substantially formed by the first sealing element.
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Abstract
An electronic device comprising a first substrate having a device area, a first sealing element comprising an anelastic material and a second sealing element being a metal. The first sealing means and the second sealing means are arranged such that the inner side or the outer side of the sealing is completely formed by the second sealing element providing hermiticity and the other side is substantially formed by the first sealing element providing a flexible sealing.
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Citations
19 Claims
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1. An electronic device comprising:
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a first substrate having a device area, a first sealing means for sealing the device area, the first sealing means having an inner side facing the device area and an outer side facing away from the device area, the first sealing means comprising a first sealing element being positioned on the first substrate, the first sealing element forming a closed loop surrounding the device area and comprising an anelastic material, a second sealing element being a metal, the second sealing element being in contact with the first sealing element along the closed loop, a second substrate positioned on the first sealing means so as to sandwich the first sealing means between the first and the second substrate for hermetically sealing the device area, wherein the first sealing element and the second sealing element are arranged such that one upright wall of the first sealing element is covered by the second sealing element such that the inner side or the outer side of the first sealing means is completely formed by the second sealing element and the other side is substantially formed by the first sealing element. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. A method for hermetically sealing a device area of a first substrate, the method comprising the steps of:
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a) providing a first substrate having a device area to be hermetically sealed; b) providing a first sealing means for sealing the device area, the first sealing means having an inner side facing the device area and an outer side facing away from the device area, the first sealing means comprising a first sealing element being positioned on the first substrate, the first sealing element forming a closed loop surrounding the device area and comprising an anelastic material and a second sealing element being a metal, the second sealing element being in contact with the first sealing element along the closed loop, and the first sealing element and the second sealing element being arranged such that one upright wall of the first sealing element is covered by the second sealing element such that the inner side or the outer side of the first sealing means is completely formed by the second sealing element and the other side is substantially formed by the first sealing element; c) providing a solder metal on top of the second sealing element; d) aligning a second substrate on top of the solder metal for hermetically sealing the area. - View Dependent Claims (15, 16, 17, 18)
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19. An electronic device comprising:
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a first substrate having a device area, a first sealing means for sealing the device area, the first sealing means having an inner side facing the device area and an outer side facing away from the device area, the first sealing means comprising a first sealing element being positioned on the first substrate, the first sealing element forming a closed loop surrounding the device area and comprising an anelastic material, a second sealing element being a metal, the second sealing element being in contact with the first sealing element along the closed loop, a second substrate positioned on the first sealing means so as to sandwich the first sealing means between the first and the second substrate for hermetically sealing the device area with a eutectic bond between the each wafer and the second sealing element, wherein the first sealing element and the second sealing element are arranged such that one upright wall of the first sealing element is covered by the second sealing element such that the inner side or the outer side of the first sealing means is completely formed by the second sealing element and the other side is substantially formed by the first sealing element, and wherein the second sealing element has a smooth Z-shaped cross-sectional profile having a thickness between 0.1 and 100 μ
m.
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Specification