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Dynamic power measurement and estimation to improve memory subsystem power performance

  • US 9,851,771 B2
  • Filed: 12/28/2013
  • Issued: 12/26/2017
  • Est. Priority Date: 12/28/2013
  • Status: Expired due to Fees
First Claim
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1. A method comprising:

  • monitoring a current draw from a memory device in response to the memory device receiving one or more known traffic patterns, including monitoring the current draw based on memory access from different sources in a processing system that includes the memory device, the different sources including a central processor and a graphics processor;

    wherein monitoring comprises receiving sensor input from current sensors in a voltage regulator that provides power to the memory device,generating a power usage characterization for the memory device based on the monitored current draw for the known traffic patterns, the power usage characterization identifying power usage with respect to the different sources of memory access;

    based on the power usage characterization, generating a power estimate to identify estimated power usage with respect to the different sources of memory access including for the central processor and the graphics processor; and

    performing load balancing among the different sources of memory access in the processing system based on a difference detected between the power estimate and actual power usage of the memory device, the load balancing including;

    in response to detecting the current draw from the memory device is higher than or equal to a threshold, lowering bandwidth for memory accesses from the central processor or the graphics processor based on the power usage characterization that identifies power usage with respect to the different sources of memory access.

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