Dynamic power measurement and estimation to improve memory subsystem power performance
First Claim
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1. A method comprising:
- monitoring a current draw from a memory device in response to the memory device receiving one or more known traffic patterns, including monitoring the current draw based on memory access from different sources in a processing system that includes the memory device, the different sources including a central processor and a graphics processor;
wherein monitoring comprises receiving sensor input from current sensors in a voltage regulator that provides power to the memory device,generating a power usage characterization for the memory device based on the monitored current draw for the known traffic patterns, the power usage characterization identifying power usage with respect to the different sources of memory access;
based on the power usage characterization, generating a power estimate to identify estimated power usage with respect to the different sources of memory access including for the central processor and the graphics processor; and
performing load balancing among the different sources of memory access in the processing system based on a difference detected between the power estimate and actual power usage of the memory device, the load balancing including;
in response to detecting the current draw from the memory device is higher than or equal to a threshold, lowering bandwidth for memory accesses from the central processor or the graphics processor based on the power usage characterization that identifies power usage with respect to the different sources of memory access.
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Abstract
Dynamic monitoring of current draw by a memory device or memory subsystem can enable a power management system to adjust a memory access performance parameter based on monitored power usage. The system can generate a power usage characterization for the memory device and/or memory subsystem based on monitoring current draw for a known pattern, and then subsequently use the power usage characterization to determine how to adjust the memory access performance parameter.
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Citations
21 Claims
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1. A method comprising:
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monitoring a current draw from a memory device in response to the memory device receiving one or more known traffic patterns, including monitoring the current draw based on memory access from different sources in a processing system that includes the memory device, the different sources including a central processor and a graphics processor; wherein monitoring comprises receiving sensor input from current sensors in a voltage regulator that provides power to the memory device, generating a power usage characterization for the memory device based on the monitored current draw for the known traffic patterns, the power usage characterization identifying power usage with respect to the different sources of memory access;
based on the power usage characterization, generating a power estimate to identify estimated power usage with respect to the different sources of memory access including for the central processor and the graphics processor; andperforming load balancing among the different sources of memory access in the processing system based on a difference detected between the power estimate and actual power usage of the memory device, the load balancing including;
in response to detecting the current draw from the memory device is higher than or equal to a threshold, lowering bandwidth for memory accesses from the central processor or the graphics processor based on the power usage characterization that identifies power usage with respect to the different sources of memory access. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A power management system, comprising:
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a current sensor to generate current usage information for a memory device based on a measurement of current for the memory device in active operation and performing monitoring of power usage pattern of known traffic, wherein monitoring comprises receiving sensor input from current sensors in a voltage regulator that provides power to the memory device; and a processor device configured to execute a power manager, the processor device to control a memory controller coupled to provide a memory access interface to the memory device, the power manager to receive the current usage information from the current sensor, determine to load balance among different sources of memory access in the processing system based on the current usage information received from the current sensor, a power usage characterization for the memory device, and a power estimate to identify estimated power usage with respect to the different sources of memory access, including for the central processor and the graphics processor, and perform load balancing among the different sources of memory access in the processing system based on a difference detected between the current usage information and the power estimate, including;
in response to detection that the current for the memory device is higher than or equal to a threshold, to lower bandwidth for memory accesses from the central processor or the graphics processor based on the power usage characterization that identifies power usage with respect to the different sources of memory access.- View Dependent Claims (9, 10, 11, 12, 13, 14)
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15. An electronic device comprising:
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a memory device to store data;
a host hardware platform including a processor device coupled to control a power management system and execute a power manager, and a memory controller device coupled to provide a memory access interface to the memory device, wherein the power management system includes a current sensor to generate current usage information for a memory device based on a measurement of current for the memory device in active operation and performing monitoring of power usage pattern of known traffic;wherein monitoring comprises receiving sensor input from current sensors in a voltage regulator that provides power to the memory device; and a power manager to receive the current usage information from the current sensor, determine to load balance among different sources of memory access based on the current usage information received from the current sensor, a power usage characterization for the memory device, and a power estimate to identify estimated power usage with respect to the different sources of memory access, including for the central processor and the graphics processor, and perform load balancing among the different sources of memory access based on a difference detected between the current usage information and the power estimate, including;
in response to detection that the current for the memory device is higher than or equal to a threshold, to lower bandwidth for memory accesses from the central processor or the graphics processor based on the power usage characterization that identifies power usage with respect to the different sources of memory access; and
a touchscreen display coupled to generate a display based on data accessed from the memory device. - View Dependent Claims (16, 17, 18, 19, 20, 21)
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Specification