Memory system, memory controller and memory control method

• US 9,852,022 B2
• Filed: 02/04/2016
• Issued: 12/26/2017
• Est. Priority Date: 09/04/2015
• Status: Active Grant

• Current Assignee: Kioxia Corporation
• Original Assignee: Toshiba Memory Corporation (Kioxia Corporation)
• Inventors: Yoshinaga, Yuma, Yamaki, Ryo, Watanabe, Daiki
• Primary Examiner(s): Alphonse, Fritz
• Application Number:
  US15/015,621
• Publication Number:
  US 20170068593A1
• Time in Patent Office: 691 Days
• Field of Search: 714764, 714780, 714755, 714 43
• CPC Class Codes: G06F 11/1068 in sector programmable memories, e.g. flash disk G06F11/1072 takes precedence
• CPC Class Codes: G11C 11/5642 Sensing or reading circuits; Data output circuits
• CPC Class Codes: G11C 2029/0409 Online test
• CPC Class Codes: G11C 2029/3602 Pattern generator
• CPC Class Codes: G11C 29/36 Data generation devices, e.g. data inverters
• CPC Class Codes: G11C 29/52 Protection of memory contents; Detection of errors in memory contents
• CPC Class Codes: H03M 13/453 wherein the candidate code words are obtained by an algebraic decoder, e.g. Chase decoding

Abstract

According to the embodiments, a memory system includes a non-volatile memory, a control unit that reads a received word from the non-volatile memory, and a decoder that performs soft-decision decode to the received word. The decoder includes a test pattern generating unit that generates test patterns, a hard decision decoder that performs hard-decision decode by using the test pattern and the received word and outputs a decoded word, and a distance calculating unit that calculates Euclidean distance between the decoded word and the received word based on the decoded words of which the number is less than that of the test patterns of all the combinations in a case where the number of flips is of one to a predetermined value and selects a decoded word which is the decoding result from among the decoded words output from the hard decision decoder based on the Euclidean distance.

Claims

1. A memory system comprising:

a non-volatile memory;

a control unit that reads a received word as a soft decision value from the non-volatile memory; and

a decoder that performs soft-decision decode to the read received word, wherein

the decoder includes

a test pattern generating unit that generates a plurality of test patterns indicating an assumed error position,

a hard decision decoder that performs hard-decision decode by using the plurality of test patterns and the read received word and outputs a plurality of decoded words, each of the plurality of decoded words corresponding to each of the plurality of test patterns,

a distance calculating unit that calculates Euclidean distance between the decoded word and the received word and selects a decoded word to be a decoding result from among the plurality of decoded words output from the hard decision decoder based on the Euclidean distance, the Euclidean distance being calculated based on the plurality of decoded words which are output from the hard decision decoder and of which the number of output decoded words is less than that of all the combinations of the test patterns in a case that the number of flips is one to a predetermined value, the number of flips being the number of errors which are assumed in the test pattern, and

a processing control unit that outputs the selected decoded word.

2. The memory system according to claim 1, wherein

the processing control unit determines the minimum value of the number of flips in the test pattern generated by the test pattern generating unit based on a first value which is the number of errors corrected by performing the hard-decision decode when the hard-decision decode has been successfully performed in a case where the number of flips is zero.

3. The memory system according to claim 2, wherein

the processing control unit determines a value obtained by adding one to a result obtained by subtracting the first value from a second value as the minimum value of the number of flips when the hard-decision decode has been successfully performed in a case where the number of flips is zero, the second value being the maximum number of correctable errors of the received word.

4. The memory system according to claim 1, wherein

the decoder includes

a hard decision processing unit that performs hard decision to a communication path value which is the read received word and generates a received word,

a least reliable bit selecting unit that selects a least reliable bit in the received word based on the communication path value, and

an error vector memory that stores a bit string corresponding to the least reliable bit in error positions obtained by performing the hard-decision decode by the hard decision decoder, and

the hard decision decoder stores the bit string to the error vector memory, outputs the decoded word corresponding to a first bit string to the distance calculating unit when the first bit string which is obtained by the hard-decision decode using the test pattern and the received word generated by the hard decision processing unit does not coincide with a second bit string which is stored in the error vector memory, and does not output the decoded word corresponding to the first bit string to the distance calculating unit when the first bit string coincides with the second bit string.

5. The memory system according to claim 1, wherein

the hard decision decoder outputs the decoded word obtained by the hard-decision decode to the distance calculating unit when the number of errors corrected by the hard-decision decode using the test pattern and the received word coincides with a second value which is the maximum number of correctable errors of the received word and does not output the decoded word obtained by the hard-decision decode to the distance calculating unit when the number of errors corrected by the hard-decision decode by the hard decision decoder is less than the maximum number of correctable errors of the received word.

6. The memory system according to claim 1, wherein

the decoder includes

a hard decision processing unit that performs hard decision to a communication path value which is the read received word and generates a received word,

a least reliable bit selecting unit that selects a least reliable bit in the received word based on the communication path value, and

an error vector memory that stores a bit string corresponding to the least reliable bit in error positions obtained by performing the hard-decision decode by the hard decision decoder and a humming weight of the received word which is obtained by removing the least reliable bit from the error positions,

the hard decision decoder outputs the decoded word obtained by the hard-decision decode to the distance calculating unit when a value obtained by adding a humming distance between a first bit string and a second bit string to the humming weight exceeds a second value, the first bit string being obtained by the hard-decision decode using the test pattern and the received word generated by the hard decision processing unit, the second bit string being stored in the error vector memory, the second value being the maximum number of correctable errors of the received word, and

the hard decision decoder does not output the decoded word obtained by the hard-decision decode to the distance calculating unit when the value obtained by adding the humming distance and the humming weight is equal to or less than the maximum number of correctable errors of the received word.

7. The memory system according to claim 1, wherein

the control unit reads the received word as a hard decision value from the non-volatile memory,

the decoder performs the hard-decision decode to the received word read as the hard decision value,

the control unit reads the received word as a soft decision value from the non-volatile memory when the hard-decision decode is failed, and

the decoder performs the soft-decision decode based on the received word read as the soft decision value.

8. The memory system according to claim 1, wherein

the received word is a codeword which is generated by performing Bose-Chandhuri-Hocquenghem encoding and is stored in the non-volatile memory.

9. A memory controller that controls a non-volatile memory, comprising:

a control unit that reads a received word as a soft decision value from the non-volatile memory; and

a decoder that performs soft-decision decode to the read received word, wherein

the decoder includes

a test pattern generating unit that generates a plurality of test patterns indicating an assumed error position,

a hard decision decoder that performs hard-decision decode by using the plurality of test patterns and the read received word and outputs a plurality of decoded words, each of the plurality of decoded words corresponding to each of the plurality of test patterns,

a distance calculating unit that calculates Euclidean distance between the decoded word and the received word and selects a decoded word to be a decoding result from among the plurality of decoded words output from the hard decision decoder based on the Euclidean distance, the Euclidean distance being calculated based on the plurality of decoded words which are output from the hard decision decoder and of which the number of output decoded words is less than that of all the combinations of the test patterns in a case that the number of flips is one to a predetermined value, the number of flips being the number of errors which are assumed in the test pattern, and

a processing control unit that outputs the selected decoded word.

10. A method for controlling a non-volatile memory, the method being performed by a memory controller, the method comprising:

reading a received word as a soft decision value from the non-volatile memory; and

performing soft-decision decode to the read received word, wherein

the soft-decision decode includes

generating a plurality of test patterns indicating an assumed error position,

performing hard-decision decode by using the plurality of test patterns and the read received word and outputting a plurality of decoded words, each of the plurality of decoded words corresponding to each of the plurality of test patterns,

calculating Euclidean distance between the decoded word and the received word based on the plurality of decoded words of which the number of output decoded words is less than that of all the combinations of the test patterns in a case that the number of flips is one to a predetermined value, the number of flips being the number of errors which are assumed in the test pattern,

selecting the decoded word which is a decoding result from among the plurality of decoded words based on the Euclidean distance, and

outputting the selected decoded word.

11. The method according to claim 10, wherein

the hard-decision decode is performed to the received word, and

the minimum value of the number of flips in the test pattern is determined which is generated based on a first value which is the number of errors corrected by the hard-decision decode in a case where the number of flips is zero.

12. The method according to claim 11, comprising:

when the hard-decision decode in a case where the number of flips is zero has been successfully performed, determining a value obtained by adding one to a result obtained by subtracting the first value from a second value as the minimum value of the number of flips, the second value being the maximum number of correctable errors of the received word.

13. The method according to claim 10, comprising:

generating the received word by performing the hard decision to a communication path value which is the read received word;

selecting a least reliable bit in the received word based on the communication path value;

storing a bit string corresponding to the low reliability bit in error positions obtained by the hard-decision decode to an error vector memory;

calculating the Euclidean distance based on a decoded word corresponding to a first bit string when the first bit string obtained by the hard-decision decode using the test pattern and the received word generated by the hard decision does not coincide with a second bit string stored in the error vector memory; and

not calculating the Euclidean distance based on the decoded word corresponding to the first bit string when the first bit string coincides with the second bit string.

14. The method according to claim 10, wherein

when the number of errors corrected by the hard-decision decode using the test pattern and the received word coincides with a second value which is the maximum number of correctable errors of the received word, the Euclidean distance is calculated based on the decoded word obtained by the hard-decision decode, and

when the number of errors corrected by the hard-decision decode is less than the maximum number of correctable errors of the received word, the Euclidean distance is not calculated based on the decoded word obtained by the hard-decision decode.

15. The method according to claim 10, comprising

generating a received word by performing hard decision to a communication path value which is the read received word;

selecting a low reliability bit in the received word based on the communication path value;

storing a bit string corresponding to the low reliability bit in the error positions obtained by the hard-decision decode and a humming weight of the received word which is obtained by removing the low reliability bit to an error vector memory;

calculating the Euclidean distance based on the decoded word obtained by the hard-decision decode when a value obtained by adding a humming distance between a first bit string and a second bit string to the humming weight exceeds a second value, the first bit string being obtained by the hard-decision decode using the test pattern and the received word generated by the hard decision processing unit, the second bit string being stored in the error vector memory, the second value being the maximum number of correctable errors of the received word; and

not calculating the Euclidean distance based on the decoded word obtained by the hard-decision decode when the value obtained by adding the humming distance to the humming weight is equal to or less than the maximum number of correctable errors of the received word.

16. The method according to claim 10, further comprising,

reading a received word as a hard decision value from the non-volatile memory;

performing the hard-decision decode to the received word as a hard decision value, wherein

when the hard-decision decode to the received word as a hard decision value has been failed, the reading the received word as a soft decision value is performed.

17. The method according to claim 10, wherein

the received word is a codeword which is generated by performing Bose-Chandhuri-Hocquenghem encoding and is stored in the non-volatile memory.