Trench Schottky rectifier device and method for manufacturing the same

• US 9,853,120 B2
• Filed: 11/23/2016
• Issued: 12/26/2017
• Est. Priority Date: 10/12/2009
• Status: Active Grant

• Current Assignee: PFC Device Holdings Ltd. (PFC Device, Inc.)
• Original Assignee: PFC Device Holdings Ltd. (PFC Device, Inc.)
• Inventors: Chen, Mei-Ling, Kuo, Hung-Hsin
• Primary Examiner(s): Shamsuzzaman, Mohammed
• Application Number:
  US15/360,155
• Publication Number:
  US 20170077262A1
• Time in Patent Office: 398 Days
• Field of Search: 257 12, 257263, 257 4, 257368, 257330, 257332, 257147, 257484, 438488, 438237, 438582, 438221, 438532, 438524
• CPC Class Codes: H01L 21/2256 through the applied layer
• CPC Class Codes: H01L 21/28537 Deposition of Schottky electrodes
• CPC Class Codes: H01L 29/0623 Buried supplementary region, e.g. buried guard ring multi-RESURF H01L29/0634
• CPC Class Codes: H01L 29/402 Field plates
• CPC Class Codes: H01L 29/66143 Schottky diodes
• CPC Class Codes: H01L 29/872 Schottky diodes

Abstract

A method for fabricating a trench Schottky rectifier device is provided. At first, a plurality of trenched are formed in a substrate of a first conductivity type. An insulating layer is formed on sidewalls of the trenches. Then, an ion implantation procedure is performed through the trenches to form a plurality of doped regions of a second conductivity type under the trenches. Subsequently, the trenches are filled with conductive structure such as metal structure or tungsten structure. At last, an electrode overlying the conductive structure and the substrate is formed. Thus, a Schottky contact appears between the electrode and the substrate. Each doped region and the substrate will form a PN junction to pinch off current flowing toward the Schottky contact to suppress the current leakage in a reverse bias mode.

Claims

1. A method for fabricating a trench Schottky rectifier device, comprising steps of:

providing a substrate having a first conductivity type;

forming a mask oxide layer on the substrate and forming a plurality of openings in the mask oxide layer;

forming a first plurality of trenches and a second plurality of trenches in the substrate according to the plurality of openings in the mask oxide layer;

forming a plurality of doped regions having a second conductivity type in the substrate under the first plurality of trenches and the second plurality of trenches;

forming an insulating layer on sidewalls of the first plurality of trenches and the second plurality of trenches;

remaining a first portion of the mask oxide layer to cover a first portion of the substrate and removing a second portion of the mask oxide layer to expose a second portion of the substrate;

forming an adhesion layer on the first portion of the mask oxide layer, the second portion of the substrate, the insulating layer, bottoms of the first plurality of trenches and the second plurality of trenches;

filling the first plurality of trenches with a first plurality of conductive structures and filling the second plurality of trenches with a second plurality of conductive structures;

forming an electrode overlying the adhesion layer, the first plurality of conductive structures and the second plurality of conductive structures;

forming a patterned photoresist layer over the electrode;

etching off portions of the electrode and an adhesion layer according to the patterned photoresist layer;

removing the patterned photoresist layer; and

wherein the adhesion layer disposed between the first portion of the mask oxide layer and the electrode on the first portion of the substrate and disposed between the electrode and the second plurality of conductive structures on the second portion of the substrate.

2. The method according to claim 1 wherein before the step of forming the insulating layer on sidewalls of the first plurality of trenches and the second plurality of trenches, the method further comprises steps of:

forming a sacrificial layer on the sidewalls of the first plurality of trenches and the second plurality of trenches; and

removing the sacrificial layer to smooth the sidewalls of the first plurality of trenches and the second plurality of trenches.

3. The method according to claim 1 wherein the substrate comprises a relatively heavily-doped N-type silicon layer and a relatively lightly-doped N-type epitaxial layer.

4. The method according to claim 1 wherein the step of forming the plurality of doped regions further comprises a step of doping the substrate with P-type dopants through bottoms of the first plurality of trenches and the second plurality of trenches to form the doped regions.

5. The method according to claim 1 wherein the step of remaining the first portion of the mask oxide layer and removing the second portion of the mask oxide layer further comprises steps of:

forming a hard mask layer on the first portion of the mask oxide layer, the second mask oxide layer, the insulating layer and bottoms of the first plurality of trenches and the second plurality of trenches;

removing a portion of the hard mask layer to expose the second portion of the mask oxide layer;

removing the exposed second portion of the mask oxide layer; and

removing the hard mask layer.

6. The method according to claim 1 wherein the first plurality of conductive structures and the second plurality of conductive structures are metal structures.

7. The method according to claim 6 wherein the step of forming the first plurality of conductive structures and the second plurality of conductive structures comprises steps of:

forming a metal layer covering the adhesion layer by a chemical vapor deposition procedure; and

performing an etch-back procedure to remove a portion of the metal layer out of the first plurality of trenches and the second plurality of trenches.

8. The method according to claim 1 wherein the electrode is made of aluminum or aluminum alloy, and the adhesion layer is made of titanium or titanium nitride.