Selective film deposition method to form air gaps

• US 9,859,151 B1
• Filed: 07/08/2016
• Issued: 01/02/2018
• Est. Priority Date: 07/08/2016
• Status: Active Grant

• Current Assignee: ASM IP Holding B.V. (ASM International NV)
• Original Assignee: ASM IP Holding B.V. (ASM International NV)
• Inventors: Zhu, Chiyu
• Primary Examiner(s): Jahan, Bilkis
• Application Number:
  US15/205,890
• Publication Number:
  US 20180012792A1
• Time in Patent Office: 543 Days
• CPC Class Codes: H01L 21/02164 the material being a silicon oxide, e.g. SiO2
• CPC Class Codes: H01L 21/02167 the material being a silicon carbide not containing oxygen, e.g. SiC, SiC:H or silicon carbonitrides H01L21/02126 and H01L21/0214 take precedence
• CPC Class Codes: H01L 21/02175 characterised by the metal H01L21/02197 takes precedence
• CPC Class Codes: H01L 21/02271 deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition H01L21/02266 takes precedence
• CPC Class Codes: H01L 21/0228 deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD
• CPC Class Codes: H01L 21/7682 the dielectric comprising air gaps
• CPC Class Codes: H01L 21/76832 Multiple layers

Abstract

A method for depositing a film to form an air gap within a semiconductor device is disclosed. An exemplary method comprises pulsing a metal halide precursor onto the substrate and pulsing an oxygen precursor onto a selective deposition surface. The method can be used to form an air gap to, for example, reduce a parasitic resistance of the semiconductor device.

Claims

1. A method of forming an air gap for a semiconductor device through selective deposition comprising:

providing a substrate for processing in a reaction chamber;

providing a first surface overlying the substrate for selectively depositing a film, wherein the first surface comprises a first vertical portion;

providing a second surface overlying the substrate, wherein the second surface comprises a second vertical portion; and

selectively depositing the film at least on the first vertical portion of the first surface;

wherein the second surface differs from the first surface and wherein deposition of the film is selective on first surface relative to deposition of the film on the second surface,

wherein selectively depositing the film defines in part an air gap, and

wherein the step of selectively depositing the film comprises;

pulsing a metal halide precursor on the first vertical portion;

pulsing an oxygen precursor on the first vertical portion; and

repeating the pulsing steps until the film grows to a desired thickness.

2. The method of claim 1, further comprising a third surface and a fourth surface overlying the substrate, wherein the third surface comprises the same material as the first surface, wherein the fourth surface comprises the same material as the second surface, and wherein the deposition is selective on third surface relative to the deposition the fourth surface.

3. The method of claim 2, wherein both the third and the fourth surfaces comprises vertical portions and selectively depositing the film comprises deposition on the said first and third vertical surfaces.

4. The method of claim 1, wherein selectively depositing the film substantially closes the air gap.

5. The method of claim 1, further comprising:

forming a dielectric layer at least on top of the selectively deposited film.

6. The method of claim 1, wherein the selectively depositing comprises an ALD process.

7. The method of claim 1, wherein the selectively depositing comprises a CVD process.

8. The method of claim 1, wherein the thickness of the selectively deposited film is over 10 nm.

9. The method of claim 1, wherein the selectivity is over 80%.

10. The method of claim 1, wherein the air gap is part of integrated circuit and has a performance similar to dielectric material with k-value of less than about 3.6.

11. The method of claim 1, wherein the air gap is part of a metallization of an integrated circuit and size of the air gap is more than 35% of the space between the metallization lines.

12. The method of claim 5, wherein the dielectric layer deposition process is non-conformal and comprises at least one of:

silicon dioxide (SiO₂), silicon carbonitride (SiCN), and a low-k material.

13. The method of claim 1, wherein the film comprises at least one of silicon oxide (SiO₂), transition metal oxide, and a low-k material.

14. The method of claim 1, wherein the film comprises niobium and oxygen.

15. The method of claim 1, wherein the first surface comprises metal and the second surface comprises silicon and wherein the second surface does not comprise metal.

16. The method of claim 1, wherein the metal halide precursor comprises NbCl₅ or TaCl₅ and wherein the oxygen precursor comprises H₂O.

17. The method of claim 1, wherein the oxygen precursor comprises at least one of:

water (H₂O), oxygen (O₂), ozone (O₃), hydrogen peroxide (H₂O₂), atomic oxygen (O), oxygen radicals, and oxygen plasma.

18. The method of claim 1, wherein a temperature of the reaction chamber ranges between 20 and 600°

C., between 100 and 500°

C., between 150 and 400°

C., or between 175 and 375°

C.

19. The method of claim 1, wherein the pulsing the metal halide precursor and the pulsing the oxygen precursor has a duration ranging between 0.01 and 120 seconds, between 0.025 and 20 seconds, between 0.05 and 10 seconds, or preferably between 0.1 and 5 seconds.