Stacked-gate super-junction MOSFET
First Claim
1. A semiconductor device that comprises:
- a substrate, the substrate being a heavily-doped semiconductor of a first type;
at least one epitaxial layer on a front side of the substrate with a lower doping concentration than the substrate;
a charge compensation structure substantially filling a volume of the epitaxial layer, the charge compensation structure comprising;
one or more vertical trenches forming one or more intermediate mesas, the one or more intermediate mesas being a moderately-doped semiconductor of a second type, with each of the one or more intermediate mesas having a mesa top that is a heavily-doped semiconductor of the first type;
a sidewall layer in the one or more vertical trenches, the sidewall layer comprising a moderately-doped semiconductor of the first type, wherein the sidewall layer is recessed lower than the mesa top to receive an overlying gate for controlling a channel between the mesa top and the sidewall layer, the gate overlapping at least a portion of the sidewall layer to extend the channel into the sidewall layer; and
a drain electrode on a back side of the substrate;
a source electrode that couples to the one or more mesa tops;
a gate electrode coupled to the one or more overlying gates; and
a thin insulating layer separating the overlying gate from the mesa top, the channel, and the sidewall layer, wherein the thin insulating layer and channel each extend vertically and horizontally beneath the gate,wherein “
moderately-doped”
indicates a dopant concentration between 1016 and 1018 atoms/cm3, and “
heavily-doped”
indicates a higher dopant concentration between 1018 and 1020 atoms/cm3.
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Accused Products
Abstract
A MOSFET having a stacked-gate super-junction design and novel termination structure. At least some illustrative embodiments of the device include a conductive (highly-doped with dopants of a first conductivity type) substrate with a lightly-doped epitaxial layer. The volume of the epitaxial layer is substantially filled with a charge compensation structure having vertical trenches forming intermediate mesas. The mesas are moderately doped via the trench sidewalls to have a second conductivity type, while the mesa tops are heavily-doped to have the first conductivity type. Sidewall layers are provided in the vertical trenches, the sidewall layers being a moderately-doped semiconductor of the first conductivity type. The shoulders of the sidewall layers are recessed below the mesa top to receive an overlying gate for controlling a channel between the mesa top and the sidewall layer. The mesa tops are coupled to a source electrode, while a drain electrode is provided on the back side of the substrate.
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Citations
10 Claims
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1. A semiconductor device that comprises:
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a substrate, the substrate being a heavily-doped semiconductor of a first type; at least one epitaxial layer on a front side of the substrate with a lower doping concentration than the substrate; a charge compensation structure substantially filling a volume of the epitaxial layer, the charge compensation structure comprising; one or more vertical trenches forming one or more intermediate mesas, the one or more intermediate mesas being a moderately-doped semiconductor of a second type, with each of the one or more intermediate mesas having a mesa top that is a heavily-doped semiconductor of the first type; a sidewall layer in the one or more vertical trenches, the sidewall layer comprising a moderately-doped semiconductor of the first type, wherein the sidewall layer is recessed lower than the mesa top to receive an overlying gate for controlling a channel between the mesa top and the sidewall layer, the gate overlapping at least a portion of the sidewall layer to extend the channel into the sidewall layer; and a drain electrode on a back side of the substrate; a source electrode that couples to the one or more mesa tops; a gate electrode coupled to the one or more overlying gates; and a thin insulating layer separating the overlying gate from the mesa top, the channel, and the sidewall layer, wherein the thin insulating layer and channel each extend vertically and horizontally beneath the gate, wherein “
moderately-doped”
indicates a dopant concentration between 1016 and 1018 atoms/cm3, and “
heavily-doped”
indicates a higher dopant concentration between 1018 and 1020 atoms/cm3. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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Specification