Nitride semiconductor element and method for manufacturing the same

• US 9,859,465 B2
• Filed: 11/11/2016
• Issued: 01/02/2018
• Est. Priority Date: 04/25/2014
• Status: Active Grant

• Current Assignee: Nichia Corporation
• Original Assignee: Nichia Corporation
• Inventors: Shimooka, Tomohiro
• Primary Examiner(s): TAYLOR, EARL N
• Application Number:
  US15/349,584
• Publication Number:
  US 20170062658A1
• Time in Patent Office: 417 Days
• CPC Class Codes: H01L 21/0242 Crystalline insulating materials
• CPC Class Codes: H01L 21/0243 Surface structure
• CPC Class Codes: H01L 21/02458 Nitrides
• CPC Class Codes: H01L 21/0254 Nitrides
• CPC Class Codes: H01L 21/02658 Pretreatments cleaning in general H01L21/02041
• CPC Class Codes: H01L 33/007 comprising nitride compounds
• CPC Class Codes: H01L 33/12 with a stress relaxation structure, e.g. buffer layer
• CPC Class Codes: H01L 33/22 Roughened surfaces, e.g. at the interface between epitaxial layers
• CPC Class Codes: H01L 33/32 containing nitrogen

Abstract

A method of manufacturing a nitride semiconductor element includes dry etching a main surface of a sapphire substrate at a c-plane side thereof, using a mask provided on the main surface, to form a plurality of projections, each having a circular bottom surface; wet etching the sapphire substrate to form an upper part of each projection into a triangular pyramid shape while maintaining the circular bottom surface of the projection; and growing a semiconductor layer made of a nitride semiconductor on a dry etched surface and a wet etched surface of the sapphire substrate.

Claims

1. A nitride semiconductor element comprising:

a sapphire substrate comprising a plurality of projections disposed on a surface thereof at a c-plane side; and

a semiconductor layer made of a nitride semiconductor and disposed on the surface of the sapphire substrate,

wherein each projection comprises a circular bottom periphery, and an upper part that has a triangular pyramid shape, and

wherein respective centers of the projections are positioned at lattice points of a triangular lattice.

2. The nitride semiconductor element according to claim 1, wherein each projection further comprises a lower part, the upper part being formed continuously with the lower part.

3. The nitride semiconductor element according to claim 1, wherein a distance between adjacent projections is in a range of 0.2 μ

m to 5 μ

m.

4. The nitride semiconductor element according to claim 1, wherein a width of each projection is in a range of 0.2 μ

m to 5 μ

m.

5. The nitride semiconductor element according to claim 1, wherein a height of each projection is in a range of 0.2 μ

m to 2 μ

m.

6. The nitride semiconductor element according to claim 1, wherein a height of the upper part of each projection is 10% or more of an overall height of that projection.

7. The nitride semiconductor element according to claim 1, wherein an angle of an inclined surface of the upper part of each projection with respect to said surface of the sapphire substrate is 33°

to 37°

.

8. A method of manufacturing a nitride semiconductor element, the method comprising:

dry etching a main surface of a sapphire substrate at a c-plane side thereof, with a mask provided on the main surface, thus forming a plurality of projections, wherein each projection comprises a circular bottom periphery, and wherein respective centers of the projections are positioned at lattice points of a triangular lattice;

wet etching the sapphire substrate, thus forming an upper part of each projection into a triangular pyramid shape while maintaining the circular bottom periphery of each projection; and

growing a semiconductor layer made of a nitride semiconductor on the sapphire substrate after said dry etching and wet etching.

9. The method according to claim 8, wherein each projection further comprises a lower part, the upper part being formed continuously with the lower part.

10. The method according to claim 8, wherein a distance between adjacent projections is in a range of 0.2 μ

m to 5 μ

m.

11. The method according to claim 8, wherein a width of each projection is in a range of 0.2 μ

m to 5 μ

m.

12. The method according to claim 8, wherein a height of each projection is in a range of 0.2 μ

m to 2 μ

m.

13. The method according to claim 8, wherein a height of the upper part of each projection is 10% or more of an overall height of that projection.

14. The method according to claim 8, further comprising:

forming a buffer layer on the surface of the sapphire substrate after said wet etching the sapphire substrate and before growing the semiconductor layer.