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Caching architecture for packet-form in-memory object caching

  • US 9,860,332 B2
  • Filed: 02/27/2014
  • Issued: 01/02/2018
  • Est. Priority Date: 05/08/2013
  • Status: Expired due to Fees
First Claim
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1. A caching system, comprising:

  • at least one processor; and

    a non-transitory processor-readable memory device storing instructions that when executed by the at least one processor causes the at least one processor to perform operations including;

    maintaining a hash table;

    receiving a sequence of network-level packets for caching, wherein each network-level packet of the sequence of network-level packets comprises at least one network header; and

    caching the sequence of network-level packets in the hash table in its original form by storing the sequence of network-level packets in the hash table as a linked list of network packets together with corresponding metadata for the sequence of network-level packets, wherein the linked list comprises each network-level packet of the sequence of network-level packets and each network header included in the network-level packet, and the corresponding metadata comprises information common to each network-level packet of the sequence of network-level packets.

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