Liquid crystal display device
First Claim
1. A liquid crystal display device comprising:
- a first substrate comprising a gate line and a data line;
a second substrate opposing the first substrate;
a liquid crystal layer between the first substrate and the second substrate;
a first sub-pixel electrode in a first sub-pixel region of the first substrate;
a second sub-pixel electrode in a second sub-pixel region of the first substrate;
a first transistor connected to the gate line, the data line, and the first sub-pixel electrode;
a second transistor connected to the gate line, the first transistor, and the second sub-pixel electrode; and
a third transistor connected to the gate line, the second sub-pixel electrode, and a storage line,wherein the second transistor comprises a plurality of divided channel regions;
wherein one of the plurality of divided channel regions of the second transistor has the same shape and area as a shape and an area of the channel region of the third transistor.
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Accused Products
Abstract
A liquid crystal display (“LCD”) device capable of easily setting up an accurate resistance ratio between thin film transistors, the LCD device includes a first substrate including a gate line and a data line, a second substrate opposing the first substrate, a liquid crystal layer between the first substrate and the second substrate, a first sub-pixel electrode in a first sub-pixel region of the first substrate, a second sub-pixel electrode in a second sub-pixel region of the first substrate, a first transistor connected to the gate line, the data line, and the first sub-pixel electrode, a second transistor connected to the gate line, the first transistor, and the second sub-pixel electrode, and a third transistor connected to the gate line, the second sub-pixel electrode, and a storage line, wherein one of the first, second, and third transistors includes a plurality of divided channel regions.
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Citations
10 Claims
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1. A liquid crystal display device comprising:
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a first substrate comprising a gate line and a data line; a second substrate opposing the first substrate; a liquid crystal layer between the first substrate and the second substrate; a first sub-pixel electrode in a first sub-pixel region of the first substrate; a second sub-pixel electrode in a second sub-pixel region of the first substrate; a first transistor connected to the gate line, the data line, and the first sub-pixel electrode; a second transistor connected to the gate line, the first transistor, and the second sub-pixel electrode; and a third transistor connected to the gate line, the second sub-pixel electrode, and a storage line, wherein the second transistor comprises a plurality of divided channel regions; wherein one of the plurality of divided channel regions of the second transistor has the same shape and area as a shape and an area of the channel region of the third transistor. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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Specification